參數(shù)資料
型號: VSC7997
廠商: Vitesse Semiconductor Corporation.
元件分類: 跨阻放大器
英文描述: 10.7 Gb/s Transimpedance Amplifier
中文描述: 10.7 Gb / s的阻放大器
文件頁數(shù): 2/2頁
文件大小: 410K
代理商: VSC7997
741 Calle Plano
Camarillo, CA 93012
Tel: 805.388.3700
Fax: 805.388.7565
www.vitesse.com
For more information on Vitesse Products visit the Vitesse web site
at www.vitesse.com or contact Vitesse Sales at (800) VITESSE
or sales@vitesse.com
VSC7997, VSC7998
2003 Vitesse Semiconductor Corporation
10.7 Gb/s Transimpedance Amplifier
S P E C I F I C AT I O N S :
Single -5.2V Power Supply
2.2mAp-p Input Overload
Operating Temperature: -20C to +100C Junction
Die Size: 1.957 mm x 1.957 mm
The VSC7997 and VSC7998 are 10.7Gb/s high performance transim-pedance
amplifiers designed for use in optical communication networks including Sonet
OC-192/SDH STM-64 and 10G Ethernet fiber links. The devices are intended for
use with a photodetector and are capable of amplifying inputs currents of up to
2.2mA with low duty cycle distortion. The VSC7997 and VSC7998 are pin and
functionally compatible. The designer has the flexibility to choose between the
5KW (VSC7997) and the 1.4KW (VSC7998) differential transimpedance as
required by system architecture and performance.
The VSC7997 and VSC7998 amplifier consists of a transimpedance stage and a
single-to-differential output stage with a gain of 20dB and 11.4dB respectively.
An external photodetector is connected to the IIN input. Pins OUTP and OUTN
are the complementary data outputs. The high gain of the VSC7997 allows for a
direct connection to the VSC8174 CRU/Demux without the need for a post
amplifier.
To provide flexibility in setting the decision threshold of the limiting amplifier or
clock and data recovery circuit, the VSC7997 and VSC7998 utilize output offset
control and adjustment of the OUTP and OUTN. Pins FBIN, OFFP, and OFFN are
used for output offset control. The OFFP and OFFN outputs connected to ground
through 100nF capacitors provide the user with the DC component of the OUTP
and OUTN data outputs. An external circuit can be used to sense the OFFP and
OFFN outputs and then generate the appropriate DC voltage at the FBIN input to
set the DC offset between OUTP and OUTN.
G E N E R A L D E S C R I P T I O N S
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