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參數(shù)資料
| 型號(hào)： | VT048A060T040FP |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封裝： | ROHS COMPLIANT PACKAGE-15 |
| 文件頁(yè)數(shù)： | 9/11頁(yè) |
| 文件大小： | 785K |
| 代理商： | VT048A060T040FP |
Voltage Transformation Module
VT048A060T040FP
vicorpower.com
Rev. 1.0
Page 7 of 11
APPLICATION NOTES & TEST CIRCUIT
Parallel Operation
In applications requiring higher current or redundancy, VTMs can be
operated in parallel without adding control circuitry or signal lines. To
maximize current sharing accuracy, it is imperative that the source and
load impedance on each VTM in a parallel array be equal. If VTMs are
being fed by an upstream PRM, the VC nodes of all VTMs must be con-
nected to the PRM VC.
To achieve matched impedances, dedicated power planes within the PC
board should be used for the output and output return paths to the
array of paralleled VTMs. This technique is preferable to using traces of
varying size and length.
The VTM power train and control architecture allow bi-directional power
transfer when the VTM is operating within its specified ranges. Bi-direc-
tional power processing improves transient response in the event of an
output load dump. The VTM may operate in reverse, returning output
power back to the input source. It does so efficiently.
Input Impedance Recommendations
To take full advantage of the VTM’s capabilities, the impedance of the
source (input source plus the PC board impedance) must be low over a
range from DC to 5 MHz. The input of the VTM (factorized bus) should
be locally bypassed with a 8 F low Q aluminum electrolytic capacitor.
Additional input capacitance may be added to improve transient
performance or compensate for high source impedance. The VTM has
extremely wide bandwidth so the source response to transients is usually
the limiting factor in overall output response of the VTM.
Anomalies in the response of the source will appear at the output of the
VTM, multiplied by its K factor of 1/8 . The DC resistance of the source
should be kept as low as possible to minimize voltage deviations on the
input to the VTM. If the VTM is going to be operating close to the high
limit of its input range, make sure input voltage deviations will not trig-
ger the input overvoltage turn-off threshold.
Input Fuse Recommendations
VI BRICKs are not internally fused in order to provide flexibility in config-
uring power systems. However, input line fusing of VI BRICKs must
always be incorporated within the power system. A fast acting fuse is
required to meet safety agency Conditions of Acceptability. The input
line fuse should be placed in series with the +In port. For agency
approvals and fusing conditions, click on the link below:
Application Notes
For VTM and VI BRICK application notes on soldering, board layout, and
system design please click on the link below:
Applications Assistance
Please contact Vicor Applications Engineering for assistance,
1-800-927-9474, or email at apps@vicorpower.com.
F1
Load
+
–
Input reflected ripple
measurement point
C2
0.47
μF
ceramic
+
–
14 V
VTM
+IN
+OUT
-OUT
+OUT
-OUT
-IN
TM
VC
PC
Figure 10 — VI BRICK VTM test circuit
Notes:
1. C3 should be placed close to the load
2. R3 may be ESR of C3 or a separate damping resistor.
[a] See Input Fuse Recommendations section
C3
10 F
R3
10 m
Ω
C1
47 F
Al electrolytic
7A[a]
Fuse
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