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參數(shù)資料
| 型號： | VVC1-FND-40M960 |
| 廠商： | VECTRON INTERNATIONAL |
| 元件分類： | XO, clock |
| 英文描述： | VCXO, CLOCK, 40.96 MHz, CMOS OUTPUT |
| 封裝： | ROHS COMPLIANT, HERMETIC SEALED, CERAMIC, SMD, 6 PIN |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 0K |
| 代理商： | VVC1-FND-40M960 |
VVC1, VVC2 Voltage Controlled Crystal Oscillator
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel: 1-88-VECTRON-1
e-mail: vectron@vectron.com
Performance Characteristics
Table 1. Electrical Performance
Parameter
Symbol
Min
Typical
Maximum
Units
Frequency
fO
1.544
65.536
MHz
Supply Voltage
1
(+5.0 V ± 5%)
(+3.3 V ± 5%)
(+2.7 V + 5%)
4
VDD
4.750
3.135
2.7
5.0
3.3
2.7
5.250
3.465
2.835
V
Supply Current
(+5.0 V)
(+2.7 or +3.3 V)
IDD
55
40
mA
Output Logic Levels
Output Logic High
2
Output Logic Low
2
VOH
VOL
0.9*VDD
0.1VDD
V
Transition Times
Rise Time
2
Fall Time
2
tR
tF
5
ns
Symmetry or Duty Cycle
3
SYM
45
50
55
%
Operating temperature (ordering option)
0/70 or –40/85
°C
Total Pull Range (ordering option)
Or
Absolute Pull Range
±50, ±100 or ±150
±50, ±80 or ±100
ppm
Test Conditions for APR (+5V option)
VC
0.5
4.5
V
Test Conditions for APR (+3.3V option)
VC
0.3
3.0
V
Gain Transfer
Positive
ppm/V
Control Voltage Impedance
90
Kohm
Control Voltage Bandwidth (-3dB)
BW
10
kHz
Package Size
5.0 x 7.0 x 1.9
mm
1. A 0.01uF and a 0.1uF capacitor should be located as close to the supply as possible (to ground) is recommended.
2. Figure 1 defines these parameters. Figure 2 illustrates the equivalent five gate TTL load and operating conditions under which
these parameters are tested and specified.
3. Symmetry is defined as (ON TIME/PERIOD with Vs= 1.4 V for TTL and Vs=2.5 V for CMOS, 5 volt operation, and Vs=1.65V
for 3.3 Volt operation.
4. Only available as 50 ppm APR.
Figure 1. Output Waveform
Figure 2. Typical Output Test Conditions (25
±5°C)
80
%
Vs
20
%
t
F
t
R
Period
On Time
+
-
+
-
I
C
V
C
4
3
.1
F
.01
F
15pF
25
6
1
I
DD
650
V
DD
1.8k
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