參數(shù)資料
型號: W3DG6464FV7D1-GG
廠商: MICROSEMI CORP-PMG MICROELECTRONICS
元件分類: DRAM
英文描述: 64M X 64 SYNCHRONOUS DRAM MODULE, 5.4 ns, ZMA144
封裝: ROHS COMPLIANT, SODIMM-144
文件頁數(shù): 7/10頁
文件大?。?/td> 165K
代理商: W3DG6464FV7D1-GG
W3DG6464FV-D1
6
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
August 2007
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specications without notice.
ADVANCED*
SPD - SERIAL PRESENCE DETECT
Byte
Function Described
Function Supported
Hex Value
-7
-75
-10
-7
-75
-10
0
Number of bytes written into serial memory at module manufacturer
128 bytes
80h
1
Total Number of bytes of SPD memory bytes
256Bytes
08h
2
Memory type
SDRAM
04h
3
Number of row addresses
13
0Dh
4
Number of column addresses
10
0Ah
5
Number of module ranks
2 ranks
02h
6
Data width of this assembly
64 bits
40h
7
Data width (continued)
-
00h
8
Voltage interface standard
LVTTL
01h
9
SDRAM cycle time at CL=3 (tCYC)
7.5ns
10ns
75h
A0h
10
SDRAM access time from clock at CL=3 (tAC)
5.4ns
6.0ns
54h
60h
11
Module conguration type
non-Parity
00h
12
Refresh rate/type
7.8μs, Self-refresh
82h
13
SDRAM width
8 bits
08h
14
Error Checking DRAM data width
-
00h
15
Minimum. CLK delay for back-to-back rand. col. addr.
1
01h
16
SDRAM device attributes: burst lengths supported
1,2,4,8, and full page
8Fh
17
SDRAM device attributes: # of banks on SDRAM device
4
04h
18
SDRAM device attributes: CAS latency
2 & 3
06h
19
SDRAM device attributes: CS latency
0
01h
20
SDRAM device attributes: Write latency
0
01h
21
SDRAM module attributes: Unbuffered
Unbuffered w/PLL
04h
22
SDRAM device attributes: general
14
0Eh
23
Minimum clock cycle time at CL=2 (tCYC)
7.5ns
10ns
75h
A0h
24
Max. data access time form clock at CL=2 (tAC)
5.4ns
6.0ns
54h
60h
25
Minimum clock cycle time at CL=1 (tCYC)
-
00h
26
Max. data access time from clock at CL=1 (tAC)
-
00h
27
Minimum row precharge time (tRP)
15ns
20ns
0Fh
14h
28
Minimum row active to row active delay (tRRD)
15ns
20ns
0Fh
14h
29
Minumum RAS to CAS (tRCD)
15ns
20ns
14h
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