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參數(shù)資料
| 型號(hào)： | W3E16M72SR-200BM |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 16M X 72 DDR DRAM, 0.75 ns, PBGA219 |
| 封裝： | 32 X 25 MM, PLASTIC, BGA-219 |
| 文件頁(yè)數(shù)： | 3/16頁(yè) |
| 文件大?。?/td> | 671K |
| 代理商： | W3E16M72SR-200BM |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W3E16M72SR-XBX
February 2005
Rev. 2
DDR DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS (NOTES 1, 6)
VCC = +2.5V ± 0.2V; -55°C TA +125°C
Parameter/Condition
Symbol
Min
Max
Units
Supply Voltage
VCC
2.3
2.7
V
I/O Supply Voltage
VCCQ
2.3
2.7
V
Input Hight Voltage: Logic 1; All inputs (21)
VIH
VREF + 0.15
VCC + 0.3
V
Input Low Voltage: Logic 0; All inputs (21)
VIL
-0.4
VREF - 0.15
V
Input Leakage Current: Any input 0V ≤ VIN ≤ VCC (All other pins not under test = 0V)
II
-2
2
μA
Output Leakage Current: I/Os are disabled; 0V ≤ VOUT ≤ VCC
IOZ
-5
5
μA
Output Levels: Full drive option - x16
High Current (VOUT = VCCQ - 0.373V, minimum VREF, minimum VTT)
Low Current (VOUT = 0.373V, maximum VREF, maximum VTT)
IOH
-16.8
–
mA
IOL
16.8
–
mA
Output Levels: Reduced drive option - 16 only
High Current (VOUT = VCCQ - 0.763V, minimum VREF, minimum VTT)
Low Current (VOUT = 0.763V, maximum VREF, maximum VTT)
IOHR
-9
–
mA
IOLR
9–
mA
I/O Reference Voltage
VREF
0.49 x VCCQ
0.51 x VCCQ
V
I/O Termination Voltage
VTT
VREF - 0.04
VREF + 0.04
V
DDR ICC SPECIFICATIONS AND CONDITIONS (NOTES 1-5, 10, 12, 14, 54)
VCC = +2.5V ± 0.2V; -55°C TA +125°C
Parameter/Condition
Symbol
Max
250Mbps
266Mbps 200Mbps
Units
OPERATING CURRENT: One bank; Active-Precharge; tRC = tRC (MIN); tCK = tCK (MIN); DQ, DM, and DQS inputs changing once
per clock cyle; Address and control inputs changing once every two clock cycles; (22, 48)
ICC0
625
600
mA
OPERATING CURRENT: One bank; Active-Read-Precharge; Burst = 2; tRC = tRC (MIN); tCK = tCK (MIN); IOUT = 0mA; Address and
control inputs changing once per clock cycle (22, 48)
ICC1
850
775
mA
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle; Power-down mode; tCK = tCK (MIN); CKE = LOW; (23, 32, 50)
ICC2P
20
mA
IDLE STANDBY CURRENT: CS# = HIGH; All banks idle; tCK = tCK (MIN); CKE = HIGH; Address and other control inputs changing
once per clock cycle. VIN = VREF for DQ, DQS, and DM (51)
ICC2F
225
mA
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active; Power-down mode; tCK = tCK (MIN); CKE = LOW (23, 32, 50)
ICC3P
150
mA
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One bank; Active-Precharge; tRC = tRAS (MAX); tCK = tCK (MIN); DQ,
DM, and DQS inputs changing twice per clock cycle; Address and other control inputs changing once per clock cycle (22)
ICC3N
250
mA
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One bank active; Address and control inputs changing once per
clock cycle; tCK = tCK (MIN); IOUT = 0mA (22, 48)
ICC4R
925
mA
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One bank active; Address and control inputs changing once per
clock cycle; tCK = tCK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle (22)
ICC4W
800
mA
AUTO REFRESH CURRENT
tREF = tRC (MIN) (27, 50)
ICC5
1225
mA
tREF = 7.8125μs (27, 50)
ICC5A
30
mA
SELF REFRESH CURRENT: CKE ≤ 0.2V
Standard (11)
ICC6
20
mA
OPERATING CURRENT: Four bank interleaving READs (BL=4) with auto precharge, tRC =tRC (MIN); tCK = tCK (MIN); Address and
control inputs change only during Active READ or WRITE commands. (22, 49)
ICC7
2000
mA
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| W3E16M72SR-225BC | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:16Mx72 Registered DDR SDRAM |
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