- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄140428 > W3E232M16S-400STC (WHITE ELECTRONIC DESIGNS CORP) 64M X 16 DDR DRAM, 0.7 ns, PDSO66 PDF資料下載
參數(shù)資料
| 型號： | W3E232M16S-400STC |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 64M X 16 DDR DRAM, 0.7 ns, PDSO66 |
| 封裝： | 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66 |
| 文件頁數(shù)： | 1/22頁 |
| 文件大?。?/td> | 0K |
| 代理商： | W3E232M16S-400STC |
W3E232M16S-XSTX
1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
December 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specications without notice.
PRELIMINARY*
2x32Mx16bit DDR SDRAM
FEATURES
Double-data-rate architecture; two data transfers
per clock cycle
Data rate = 200, 266, 333, 400 Mbs
Package:
66pin TSOP II package
2.5V ±0.2V core power supply
2.5V I/O (SSTL_2 compatible)
Differential clock inputs(CK and CK#)
DLL aligns DQ and DQS transition with CK
MRS cycle with address key programs
Read latency : 2, 2.5 , 3 (Clock)
Burst length (2, 4, or 8)
Burst type (sequential & interleave)
Auto & Self refresh Modes
RoHS Compliant
Commands entered on each positive CK edge
Internal pipelined double-data-rate (DDR)
architecture; two data accesses per clock cycle
Bidirectional data strobe (DQS) transmitted/
received with data, i.e., source-synchronous data
capture (one per byte)
DQS edge-aligned with data for READs; center-
aligned with data for WRITEs
Four internal banks for concurrent operation
Data mask (DM) pins for masking write data
(one per byte)
Programmable IOL/IOH option
Auto precharge option
Auto Refresh and Self Refresh Modes
Commercial, and Industrial Temperature Ranges
Organized as 2X32M x 16
* This product is under development, is not qualied +and is subject to change
without notice.
OPERATING FREQUENCIES
DDR400
DDR333
DDR266
DDR200
Speed @CL2
—
133MHz
100MHz
Speed @CL2.5
166MHz
133MHz
Speed @CL3
200MHz
—
* CL = CAS Latency
32Mx16
CK, CK#, CAS, LDM, UDM
RAS#, WE#, UDQS, LDQS
CS0#, CKE0
CS1#, CKE1
I/O0 ~ I/O15
A0-A12, BA0, BA1
32Mx16
FUNCTIONAL BLOCK DIAGRAM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WS128K32V-45HM | 512K X 8 MULTI DEVICE SRAM MODULE, 45 ns, HIP66 |
| WS128K32N-85HQ | 512K X 8 MULTI DEVICE SRAM MODULE, 85 ns, HIP66 |
| WPS256K16T-15LJI | 256K X 16 STANDARD SRAM, 15 ns, PDSO44 |
| WMF256K8-70FEI5A | 256K X 8 FLASH 5V PROM, 70 ns, CDFP32 |
| WMS512K8BV-20FIEA | 512K X 8 STANDARD SRAM, 20 ns, CDFP36 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3E232M16S-400STCG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:2x32Mx16bit DDR SDRAM |
| W3E232M16S-400STI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:2x32Mx16bit DDR SDRAM |
| W3E232M16S-400STIG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:2x32Mx16bit DDR SDRAM |
| W3E232M16S-XSTX | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:2x32Mx16bit DDR SDRAM |
| W3E32M64S-200BC | 制造商:Microsemi Corporation 功能描述:32M X 64 DDR, 2.5V, 200 MHZ, 219 PBGA, COMMERCIAL TEMP. - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。