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參數(shù)資料
| 型號： | W3EG7217S202D3 |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 16M X 72 DDR DRAM MODULE, 0.8 ns, DMA184 |
| 封裝： | DIMM-184 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 235K |
| 代理商： | W3EG7217S202D3 |
5
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W3EG7217S-D3
December 2004
Rev. 1
IDD SPECIFICATIONS AND TEST CONDITIONS
0°C TA 70°C, VCCQ = 2.5V ± 0.2V, VCC = 2.5V ± 0.2V
Includes PLL and Register Power
Parameter
Symbol
Conditions
DDR266@CL = 2
Max
DDR266@CL = 2.5
Max
DDR200@CL = 2
Max
Units
Operating Current
IDD0
One device bank; Active = Precharge; tRC = tRC(MIN); tCK =
tCK(MIN); DQ,DM and DQS inputs changing once per clock
cycle; Address and control inputs changing once every two
cycles.
1266
1221
mA
Operating Current
IDD1
One device bank; Active-Read-Precharge; Burst = 2; tRC =
tRC(MIN);tCK = tCK (MIN); Iout = 0mA; Address and control
inputs changing once per clock cycle.
1356
mA
Precharge Power-
Down Standby Current
IDD2P
All device banks idle; Power- down mode; tCK = tCK(MIN);
CKE = (low)
27
mA
dle Standby Current
IDD2F
CS# = High; All device banks idle; tCK = tCK(MIN); CKE =
high; Address and other control inputs changing once per
clock cycle. VIN = VREF for DQ, DQS and DM.
750
705
mA
Active Power-Down
Standby Current
IDD3P
One device bank active; Power-down mode; tCK(MIN); CKE
= (low)
225
180
mA
Active Standby Current
IDD3N
CS# = High; CKE = High; One device bank; Active-
Precharge; tRC = tRAS(MAX); tCK = tCK(MIN); DQ, DM and
DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle.
795
750
mA
Operating Current
IDD4R
Burst = 2; Reads; Continuous burst; One device bank active;
Address and control inputs changing once per clock cycle;
tCK = tCK(MIN); IOUT = 0mA.
1446
1401
mA
Operating Current
IDD4W
Burst = 2; Writes; Continous burst; One device bank active;
Address and control inputs changing once per clock cycle;
tCK = tCK(MIN); DQ,DM and DQS inputs changing twice per
clock cycle.
1401
1356
mA
Auto Refresh Current
IDD5
tRC = tRC(MIN)
2325
mA
Self Refresh Current
IDD6
CKE
≤ 0.2V
372
363
mA
Operating Current
IDD7A
Four bank interleaving Reads (BL = 4) with auto precharge
with tRC = tRC (MIN); tCK = tCK(MIN); Address and control
inputs change only during Active Read or Write commands.
3246
3201
mA
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