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參數(shù)資料
| 型號(hào)： | W3EG7232S-AD4 |
| 英文描述： | 256MB - 32Mx72 DDR SDRAM UNBUFFERED w/PLL |
| 中文描述： | 256MB的- 32Mx72 DDR內(nèi)存緩沖瓦特/鎖相環(huán) |
| 文件頁(yè)數(shù)： | 5/14頁(yè) |
| 文件大?。?/td> | 321K |
| 代理商： | W3EG7232S-AD4 |
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White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W3EG7232S-AD4
-BD4
August 2005
Rev. 4
PRELIMINARY
I
DD
SPECIFICATIONS AND TEST CONDITIONS
0°C
≤
T
A
≤
70°C, V
CCQ
= 2.5V ± 0.2V, V
CC
= 2.5V ± 0.2V
Parameter
Operating Current
Symbol Conditions
I
DD0
One device bank; Active - Precharge; (MIN); DQ,DM and
DQS inputs changing once per clock cycle; Address and
control inputs changing once every two cycles. T
RC
=T
RC
(MIN);
T
CK
=T
CK
I
DD1
One device bank; Active-Read-Precharge; Burst = 2;
T
RC
=T
RC
(MIN);T
CK
=T
CK
(MIN); Iout = 0mA; Address and
control inputs changing once per clock cycle.
I
DD2P
All device banks idle; Power-down mode; T
CK
=T
CK
(MIN);
CKE=(low)
I
DD2F
CS# = High; All device banks idle; T
CK
=T
CK
(MIN); CKE = high;
Address and other control inputs changing once per clock
cycle. V
IN
= V
REF
for DQ, DQS and DM.
I
DD3P
One device bank active; Power-down mode; T
CK
(MIN);
CKE=(low)
I
DD3N
CS# = High; CKE = High; One device bank; Active-Precharge;
T
RC
=T
RAS
(MAX); T
CK
=T
CK
(MIN); DQ, DM and DQS inputs
changing twice per clock cycle; Address and other control
inputs changing once per clock cycle.
I
DD4R
Burst = 2; Reads; Continous burst; One device bank
active;Address andcontrol inputs changing once per clock
cycle; T
CK
=T
CK
(MIN); I
OUT
= 0mA.
I
DD4W
Burst = 2; Writes; Continous burst; One device bank active;
Address and control inputs changing once per clock cycle;
T
CK
=T
CK
(MIN); DQ,DM and DQS inputs changing twice per
clock cycle.
I
DD5
T
RC
=T
RC
(MIN)
I
DD6
CKE ≤ 0.2V
I
DD7A
Four bank interleaving Reads (BL=4) with auto precharge with
T
RC
=T
RC
(MIN); T
CK
=T
CK
(MIN); Address and control inputs
change only during Active Read or Write commands
DDR333@
CL=2.5
DDR266@
CL=2, 2.5
DDR200@
CL=2
Units
mA
Max
1400
Max
1400
Max
1400
Operating Current
1805
1805
1715
mA
Precharge Power-Down
Standby Current
Idle Standby Current
36
36
36
mA
725
725
680
mA
Active Power-Down
Standby Current
Active Standby Current
270
270
225
mA
815
815
725
mA
Operating Current
1850
1850
1625
mA
Operating Current
1850
1850
1625
mA
Auto Refresh Current
Self Refresh Current
Operating Current
2570
311
3965
2570
311
3965
2390
311
3425
mA
mA
mA
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| W3EG7232S-BD4 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256MB - 32Mx72 DDR SDRAM UNBUFFERED w/PLL |
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