參數(shù)資料
型號： W3H32M64EA-667SBC
廠商： MICROSEMI CORP-PMG MICROELECTRONICS
元件分類： DRAM
英文描述： 32M X 64 DDR DRAM, PBGA208
封裝： 16 X 20 MM, 1 MM PITCH, PLASTIC, BGA-208
文件頁數(shù)： 18/28頁
文件大?。?/td> 1057K
代理商： W3H32M64EA-667SBC
25
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
February 2010 2010 White Electronic Designs Corp. All rights reserved
Rev. 0
ADVANCED
White Electronic Designs Corp. reserves the right to change products or specications without notice.
W3H32M64EA-XSBX
TABLE 12 – AC TIMING PARAMETERS
(continued)
-55°C ≤ TA < +125°C; VCCQ = + 1.8V ± 0.1V, VCC = +1.8V ± 0.1V
Parameter
Symbol
667Mbs CL5
533Mbs CL4
400Mbs CL3
Unit
Min
Max
Min
Max
Min
Max
Command
and
Address
Address and control input pulse width for each input
tIPW
0.6
tCK
Address and control input setup time
tISa
400
500
600
ps
tISb
200
250
350
ps
Address and control input hold time
tIHa
400
500
600
ps
tIHb
275
375
475
ps
CAS# to CAS# command delay
tCCD
222
tCK
ACTIVE to ACTIVE (same bank) command
tRC
55
ns
ACTIVE bank a to ACTIVE bank b command
tRRD
10
ns
ACTIVE to READ or WRITE delay
tRCD
15
ns
Four Bank Activate period
tFAW
50
ns
ACTIVE to PRECHARGE command
tRAS
40
70,000
40
70,000
40
70,000
ns
Internal READ to precharge command delay
tRTP
7.5
ns
Write recovery time
tWR
15
ns
Auto precharge write recovery + precharge time
tDAL
tWR + tRP
ns
Internal WRITE to READ command delay
tWTR
7.5
10
ns
PRECHARGE command period
tRP
15
ns
PRECHARGE ALL command period
tRPA
tRP + tCK
ns
LOAD MODE command cycle time
tMRD
222
tCK
CKE low to CK, CK# uncertainty
tDELAY
tIS +tIH + tCK
ns
Refresh
REFRESH to Active or Refresh to Refresh command interval
tRFC
105
70,000
105
70,000
105
70,000
ns
Average periodic refresh interval (Comm + Ind Temp)
tREFI
7.8
μs
Average periodic refresh interval (Military Temp)
tREFI
1.95
μs
Self
Refresh
Exit self refresh to non-READ command
tXSNR
tRFC(MIN) +
10
tRFC(MIN)
+ 10
tRFC(MIN)
+ 10
ns
Exit self refresh to READ
tXSRD
200
tCK
Exit self refresh timing reference
tlSXR
tIS
ps
ODT
ODT tum-on delay
tAOND
222222
tCK
ODT turn-on
tACN
tAC(MIN)
tAC(MAX) +
1000
tAC(MIN)
tAC(MAX) +
1000
tAC(MIN)
tAC(MAX) +
1000
ps
ODT turn-off delay
tAOFD
2.5
tCK
ODT tum-off
tAOF
tAC(MIN)
tAC(MAX) +
600
tAC(MIN)
tAC(MAX) +
600
tAC(MIN)
tAC(MAX) +
600
ps
ODT tum-on (power-down mode)
tAONPD
tAC(MIN) +
2000
2 x tCK +
tAC(MAX) +
1000
tAC(MIN) +
2000
2 x tCK +
tAC(MAX) +
1000
tAC(MIN) +
2000
2 x tCK +
tAC(MAX) +
1000
ps
ODT turn-off (power-down mode)
tAOFPD
tAC(MIN) +
2000
2 x tCK +
tAC(MAX) +
1000
tAC(MIN) +
2000
2.5 x tCK +
tAC(MAX) +
1000
tAC(MIN) +
2000
2.5 x tCK +
tAC(MAX) +
1000
ps
ODT to power-down entry latency
tANPD
333
tCK
ODT power-down exit latency
tAXPD
888
tCK
Power-Down
Exit active power-down to READ command, MR[bit12=0]
tXARD
222
tCK
Exit active power-down to READ command, MR[bit12=1]
tXARDS
7-AL
6-AL
tCK
Exit precharge power-down to any non-READ command
tXP
222
tCK
CKE minimum high/low time
tCKE
333
tCK
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W3H32M64E-ES 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package
W3H32M64E-ESC 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package
W3H32M64E-ESI 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package
W3H32M64E-ESM 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package
W3H32M64E-SB 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package
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