參數(shù)資料
型號(hào): W65C832PL-10
元件分類: 32位微控制器
英文描述: 32-Bit Microprocessor
中文描述: 32位微處理器
文件頁數(shù): 6/62頁
文件大?。?/td> 891K
代理商: W65C832PL-10
WESTERN DESIGN CENTER
W65C816S
March 1, 2000
6
INTRODUCTION
The WDC W65C816S is a fully static CMOS 16-bit microprocessor featuring software compatibility* with the 8-bit NMOS
and CMOS 6500-series predecessors. The W65C816S extends addressing to a full 16 megabytes. These devices offer the many
advantages of CMOS technology, including increased noise immunity, higher reliability, and greatly reduced power
requirements. A software switch determines whether the processor is in the 8-bit "emulation" mode, or in the native mode, thus
allowing existing systems to use the expanded features.
As shown in the processor programming model, Figure 1-1, the Accumulator, ALU, X and Y Index registers, and Stack Pointer
register have all been extended to 16 bits. A new 16-bit Direct Page register augments the Direct Page addressing mode
(formerly Zero Page addressing). Separate Program Bank and Data Bank registers allow 24-bit memory addressing with
segmented or linear addressing.
Four new signals provide the system designer with many options. The ABORT input can interrupt the currently executing
instruction without modifying internal register, thus allowing virtual memory system design. Valid Data Address (VDA) and
Valid Program Address (VPA) outputs facilitate dual cache memory by indicating whether a data segment or program segment
is accessed. Modifying a vector is made easy by monitoring the Vector Pull (VP) output. Future Microprocessors will support
all current W65C816S operating modes for both index and offset address generation.
The information included in this data sheet reflects a standard 5 volt power supply specification. The testing process can be
modified to meet most custom needs for power supply voltage, temperature or timing.
KEY FEATURES OF THE W65C816S
Advanced fully static CMOS design for low
power consumption and increased noise
immunity
Single 1.2-6.0 volt power supply, as
specified
Emulation mode allows complete hardware
and software compatibility with 6502 designs
24-bit address bus allows access to 16
MBytes of memory space
Full 16-bit ALU, Accumulator, Stack
Pointer and Index Registers
Valid Data Address (VDA) and Valid
Program Address (VPA) output allows dual
cache and cycle steal DMA implementation
Vector Pull (VP) output indicates when
interrupt vectors are being addressed; may be
used to implement vectored interrupt
design
Abort (ABORT) input and associated vector
supports virtual memory system design
Low power consumption (2mA @ 1MHz)
allows battery-powered operation (1
F
A)
standby current.
Separate program and data bank registers
allow program segmentation or full 16
MByte linear addressing
New Direct Register and stack relative
addressing provides capability for re-entrant,
re-cursive and re-locatable programming
24 addressing modes - 13 original 6502 modes
with 92 instructions using 256 OpCodes
Wait-for-Interrupt (WAI) and Stop-the-Clock
(STP) instructions further reduce power
consumption, decrease interrupt latency and
allows synchronization with external events
Co-Processor (COP) instruction with
associated vector supports co-processor
configurations, i.e., floating point processors
Block move ability
*Except for the bit manipulation instructions which do not exist for the W65C816S
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