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| 型號： | W65C832PL-4 |
| 元件分類： | 32位微控制器 |
| 英文描述： | 32-Bit Microprocessor |
| 中文描述： | 32位微處理器 |
| 文件頁數(shù)： | 22/62頁 |
| 文件大?。?/td> | 891K |
| 代理商： | W65C832PL-4 |
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WESTERN DESIGN CENTER
W65C816S
March 1, 2000
22
3.5.12
The second and third bytes of the instruction are added to the X Index Register to form the low-order 16-bits of the
effective address. The Data Bank Register contains the high-order 8 bits of the effective address.
Absolute Indexed With X-a,x
Instruction:
OpCo
DBR
addrl
addrh
addrh
addrl
X Reg
+
Operand
effective address
3.5.13
The second, third and fourth bytes of the instruction form a 24-bit base address. The effective address is the sum of
this 24-bit address and the X Index Register.
Absolute Long Indexed With X-al,x
Instruction:
OpCo
baddr
addrl
addrh
addrh
addrl
X Reg
baddr
+
Operand
effective address
3.5.14
The second and third bytes of the instruction are added to the Y Index Register to form the low-order 16 bits of the
effective address. The Data Bank Register contains the high-order 8 bits of the effective address.
Absolute Indexed With Y-a,y
Instruction:
OpCo
DBR
addrl
addrh
addrh
addrl
Y Reg
+
Operand
effective address
3.5.15
This address mode, referred to as Relative Addressing, is used only with the Branch instructions. If the condition
being tested is met, the second byte of the instruction is added to the Program Counter, which has been updated to
point to the OpCode of the next instruction. The offset is a signed 8-bit quantity in the range from -128 to 127. The
Program Bank Register is not affected.
Program Counter Relative-r
3.5.16
This address mode, referred to as Relative Long Addressing, is used only with the Unconditional Branch Long
instruction (BRL) and the Push Effective Relative instruction (PER). The second and third bytes of the instruction
are added to the Program Counter, which has been updated to point to the OpCode of the next instruction. With the
branch instruction, the Program Counter is loaded with the result. With the Push Effective Relative instruction, the
result is stored on the stack. The offset is a signed 16-bit quantity in the range from -32768 to 32767. The Program
Bank Register is not affected.
Program Counter Relative Long-rl
3.5.17
The second and third bytes of the instruction form an address to a pointer in Bank 0. The Program Counter is
loaded with the first and second bytes at this pointer. With the Jump Long (JML) instruction, the Program Bank
Register is loaded with the third byte of the pointer.
Absolute Indirect-(a)
Instruction:
Indirect Address:
OpCode
addrl
00
addrh
addrh
addrl
New PC = (indirect address)
with JML:
New PC = (indirect address)
New PBR = (indirect address +2)
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| W65C90P-6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Magnitude Comparator |
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