- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361790 > W722 Controller Miscellaneous - Datasheet Reference PDF資料下載
參數(shù)資料
| 型號： | W722 |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 8/18頁 |
| 文件大?。?/td> | 130K |
| 代理商： | W722 |
I
W722 USB Hub/Compound Device Controller
I
–––––––––––––––––––––––––––––––––––––––––––––––––––––
6
Oki Semiconductor
Application Interface
Signal
Type
Assertion
Description
sys_clock
Input
—
Clock
. Attach a 12-MHz clock signal to this input for full-speed operation and 1.5-MHz
clock signal for low-speed operation.
sys_reset
Input
HIGH
W722 Reset.
Asserting this signal HIGH resets the W722 Megamacro Function. The ap-
plication module is required to assert this signal at power-on.
mwr_rdb
Input
—
Write/Read Select.
When external application logic asserts this signal HIGH, the applica-
tion is in WRITE mode. When asserted LOW, the application is in READ mode. External
application logic asserts this signal HIGH when writing data to the transmit FIFOs or to the
register files. External application logic asserts this signal LOW when reading data from
the receiving FIFOs or from the register files. The register files contain information describ-
ing the function and transaction status.
usb_reset
Output
HIGH
USB Reset
. This is the reset signal from the USB device controller.
[7:0]ma
Input
—
Address Bus.
These eight inputs receive the address of the register files in the USB device
controller.
[7:0]md
Input
—
Input Data Bus.
These eight inputs receive the data to be stored in the register files or
transmit FIFOs.
mrdyb
Input
LOW
Data Strobe.
When asserted LOW and in WRITE mode, the data on the [7:0]md signal
lines are valid for writing. When asserted LOW and in READ mode, the data on the [7:0]pd
signals are valid for reading.
[7:0]pd
Output
—
Output Data Bus
. These eight outputs transmit data received from either the register files
or the receive FIFOs.
[3:0]pkt_rdy
Output
HIGH
Packet Ready
. When the W722 asserts this signal, it indicates that one of the four receive
FIFOs contains valid data. The application reads the data through the [7:0]pd bus.
full_spden
Input
—
USB Full Speed Enable.
The application module sets this pin to “1” to select full-speed
operation and “0” to select low-speed operation.
setup_rdy
Output
HIGH
Setup Ready.
Asserting this signal HIGH indicates an 8-byte SETUP data sequence has
been received from the USB bus.
iso_err
Output
HIGH
Isochronous Error.
Used for loopback testing or to indicate isochronous data has been re-
ceived with DATA1 PID.
validsof
Output
HIGH
Valid SOF
. This signal is asserted for two bit times, asynchronous to sys_clock, and indi-
cates a valid SOF token is received when asserted HIGH.
sel_ext_pll
Input
HIGH
Select External PLL
. Asserting this signal HIGH selects the external PLL option.
testmode
Input
HIGH
Testmode
. Asserting this signal invokes a loopback test mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W72963APOLLOELITE | BEWEGUNGSMELDER IR REICHW 12M |
| W72M64V-XBX | Flash MCP |
| W72M64VK120BM | 2Mx64 3.3V Simultaneous Operation Flash Multi-Chip Package |
| W72M64VK100BC | 2Mx64 3.3V Simultaneous Operation Flash Multi-Chip Package |
| W72M64VK100BI | 2Mx64 3.3V Simultaneous Operation Flash Multi-Chip Package |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W72217 | 制造商:DANAHER - INDUSTRIAL/SPECIALTY 功能描述:LS-800-4-SS-SS-SPDT-020-GR3-2, LEVEL SWITCH |
| W7224-D5 | 功能描述:插入式交流適配器 72 Watts 24V RoHS:否 制造商:Phihong 地區(qū):Universal 安裝風格:Wall, Interchangeable Plug 輸入電壓范圍:90 VAC to 264 VAC 輸出端數(shù)量:1 輸出功率額定值:5 W 輸出電壓（通道 1）:5 V 輸出電流（通道 1）:1 A 直流輸出連接器:USB Type A 隨附/必需的交流插頭:Required 商用/醫(yī)用:Commercial 效率:Level V |
| W722LS | 制造商:LUMINIS 制造商全稱:LUMINIS 功能描述:Post top mount |
| W724 3/4B | 制造商:Thomas & Betts 功能描述:SOCKET CLAMP WASHER |
| W72-43 | 制造商:Olympic Controls Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。