參數(shù)資料
型號(hào)： W78E52P-40
元件分類(lèi)： 8位微控制器
英文描述： 8-BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 8/22頁(yè)
文件大?。?/td> 306K
代理商： W78E52P-40
Preliminary W78E52B
- 8 -
Before Watchdog time-out occurs, the program must clear the 14-bit timer by writing 1 to WDTC.6
(CLRW). After 1 is written to this bit, the 14-bit timer, prescaler and this bit will be reset on the next
instruction cycle. The Watchdog timer is cleared on reset.
OSC
1/12
PRESCALER
14-BIT TIMER
CLEAR
CLRW
EXTERNAL
RESET
INTERNAL
RESET
WIDL
IDLE
ENW
Watchdog Timer Block Diagram
Typical Watch-Dog time-out period when OSC = 20 MHz
PS2 PS1 PS0
0 0 0
0 1 0
0 0 1
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
WATCHDOG TIME-OUT PERIOD
19.66 mS
39.32 mS
78.64 mS
157.28 mS
314.57 mS
629.14 mS
1.25 S
2.50 S
Clock
The W78E52B is designed to be used with either a crystal oscillator or an external clock. Internally,
the clock is divided by two before it is used. This makes the W78E52B relatively insensitive to duty
cycle variations in the clock. The W78E52B incorporates a built-in crystal oscillator. To make the
oscillator work, a crystal must be connected across pins XTAL1 and XTAL2. In addition, a load
capacitor must be connected from each pin to ground. An external clock source should be connected
to pin XTAL1. Pin XTAL2 should be left unconnected. The XTAL1 input is a CMOS-type input, as
required by the crystal oscillator.
Power Management
Idle Mode
The idle mode is entered by setting the IDL bit in the PCON register. In the idle mode, the internal
clock to the processor is stopped. The peripherals and the interrupt logic continue to be clocked. The
processor will exit idle mode when either an interrupt or a reset occurs.
相關(guān)PDF資料
PDF描述
W78E54B-24 MICROCONTROLLER|8-BIT|8051 CPU|CMOS|DIP|40PIN|PLASTIC
W78E54B-40 MICROCONTROLLER|8-BIT|8051 CPU|CMOS|DIP|40PIN|PLASTIC
W78E54BF-24 MICROCONTROLLER|8-BIT|8051 CPU|CMOS|QFP|44PIN|PLASTIC
W78E54BF-40 MICROCONTROLLER|8-BIT|8051 CPU|CMOS|QFP|44PIN|PLASTIC
W78E54BP-24 MICROCONTROLLER|8-BIT|8051 CPU|CMOS|LDCC|44PIN|PLASTIC
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