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參數(shù)資料
| 型號(hào)： | W78M32V120BM |
| 英文描述： | 8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| 中文描述： | 8Mx32閃光3.3V的頁面模式同步讀/寫操作多芯片封裝 |
| 文件頁數(shù)： | 5/54頁 |
| 文件大?。?/td> | 756K |
| 代理商： | W78M32V120BM |
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5
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W78M32V-XBX
April 2006
Rev. 3
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
equivalent to t
PACC
. When CS# is deasserted (CS#=V
IH
),
the reassertion of CS# for subsequent access has access
time of t
ACC
or t
CS
. Here again, CS# selects the device and
OE# is the output control and should be used to gate data
to the output inputs if the device is selected. Fast page
mode accesses are obtained by keeping A22–A3 constant
and changing A2–A0 to select the specific word within that
page.
The device features an
Unlock Bypass
mode to facilitate
faster programming. Once a bank enters the Unlock Bypass
mode, only two write cycles are required to program a word,
instead of four. The “Word Program Command Sequence”
section has details on programming data to the device using
both standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors,
or the entire device.
Table 4
indicates the address space
that each sector occupies. A “bank address” is the address
bits required to uniquely select a bank. Similarly, a “sector
address” refers to the address bits required to uniquely
select a sector. The “Command Definitions” section has
details on erasing a sector or the entire chip, or suspending/
resuming the erase operation.
I
CC2
in the DC Characteristics table represents the
active current specification for the write mode. The
AC
Characteristics
section contains timing specification tables
and timing diagrams for write operations.
Accelerated Program Operation
The device offers accelerated program operations through
the A
CC
function. This function is primarily intended to allow
faster manufacturing throughput at the factory.
If the system asserts V
HH
on this pin, the device automatically
enters the mentioned Unlock Bypass mode, temporarily
unprotects any protected sectors, and uses the higher
voltage on the pin to reduce the time required for program
operations. The system would use a two-cycle program
command sequence as required by the Unlock Bypass
mode. Removing V
HH
from the WP#/ACC pin returns the
device to normal operation. Note that V
HH
must not be
asserted on WP#/ACC for operations other than accelerated
programming, or device damage may result. In addition,
the WP#/ACC pin should be raised to V
CC
when not in
use. That is, the WP#/ACC pin should not be left floating
or unconnected; inconsistent behavior of the device may
result.
Autoselect Functions
If the system writes the autoselect command sequence, the
device enters the autoselect mode. The system can then
read autoselect codes from the internal register (which is
separate from the memory array) on DQ63–DQ0. Standard
read cycle timings apply in this mode. Refer to the
Autoselect
Mode
and
Autoselect Command Sequence
sections for
more information.
TABLE 2. PAGE SELECT
A2
0
0
0
0
1
1
1
1
Word
Word 0
Word 1
Word 2
Word 3
Word 4
Word 5
Word 6
Word 7
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
SIMULTANEOUS OPERATION
In addition to the conventional features (read, program,
erase-suspend read, and erase-suspend program), the
device is capable of reading data from one bank of memory
while a program or erase operation is in progress in another
bank of memory (simultaneous operation). The bank can be
selected by bank addresses (A22–A20) with zero latency.
The simultaneous operation can execute multi-function
mode in the same bank.
TABLE 3. BANK SELECT
Bank
Bank A
Bank B
Bank C
Bank D
A22-A20
000
001, 010, 011
100, 101, 110
111
WRITING COMMANDS/COMMAND
SEQUENCES
To write a command or command sequence (which includes
programming data to the device and erasing sectors of
memory), the system must drive WE# and CS# to V
IL
, and
OE# to V
IH
.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| W78M32V70BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| W78M32V70BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| W78M32V70BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| W78M32V90BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| W78M32V90BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
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