參數(shù)資料
型號(hào)： W83627SF
英文描述： W83627F plus Smart Card Reader Interface. VID Control. GP I/O?
中文描述： W83627F加上智能卡閱讀器接口。 VID控制。大獎(jiǎng)賽的I / O？
文件頁數(shù)： 5/147頁
文件大?。?/td> 1348K
代理商： W83627SF
W83627SF
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Publication Release Date: Nov. 2000
Revision 0.60
-III -
5.1.8 Bank0.Reg7 - User Defined Register (UDR/AUDR) ----------------------------------------------------------------------- 61
5.1.9 Bank1.Reg0~1 - Baud Rate Divisor Latch (BLL/BHL) ------------------------------------------------------------------- 62
5.1.10 Bank1.Reg2 - Version ID Regiister I (VID)--------------------------------------------------------------------------------- 63
5.1.11 Bank0~3.Reg3 - CIR Control Register 0/Bank Select Register (CTR0/BSR) (BANK0~3)-------------------- 63
5.1.12 Bank1.Reg4 - Timer Low Byte Register (TMRL)-------------------------------------------------------------------------- 63
5.1.13 Bank1.Reg5 - Timer High Byte Register (TMRH) ------------------------------------------------------------------------ 63
6. PARALLEL PORT------------------------------------------------------------------------------------------64
6.1 PRINTER INTERFACE LOGIC--------------------------------------------------------------------------------------------------------- 64
6.2 ENHANCED PARALLEL PORT (EPP)----------------------------------------------------------------------------------------------- 65
6.2.1 Data Swapper------------------------------------------------------------------------------------------------------------------------ 66
6.2.2 Printer Status Buffer---------------------------------------------------------------------------------------------------------------- 66
6.2.3 Printer Control Latch and Printer Control Swapper--------------------------------------------------------------------- 67
6.2.4 EPP Address Port------------------------------------------------------------------------------------------------------------------- 67
6.2.5 EPP Data Port 0-3------------------------------------------------------------------------------------------------------------------ 68
6.2.6 Bit Map of Parallel Port and EPP Registers -------------------------------------------------------------------------------- 68
6.2.7 EPP Pin Descriptions-------------------------------------------------------------------------------------------------------------- 69
6.2.8 EPP Operation----------------------------------------------------------------------------------------------------------------------- 69
6.3 EXTENDED CAPABILITIES PARALLEL (ECP) PORT-------------------------------------------------------------------------- 70
6.3.1 ECP Register and Mode Definitions------------------------------------------------------------------------------------------- 70
6.3.2 Data and ecpAFifo Port----------------------------------------------------------------------------------------------------------- 71
6.3.3 Device Status Register (DSR)---------------------------------------------------------------------------------------------------- 71
6.3.4 Device Control Register (DCR)------------------------------------------------------------------------------------------------- 72
6.3.5 cFifo (Parallel Port Data FIFO) Mode = 010------------------------------------------------------------------------------ 73
6.3.6 ecpDFifo (ECP Data FIFO) Mode = 011 ------------------------------------------------------------------------------------ 73
6.3.7 tFifo (Test FIFO Mode) Mode = 110------------------------------------------------------------------------------------------ 73
6.3.8 cnfgA (Configuration Register A) Mode = 111----------------------------------------------------------------------------- 73
6.3.9 cnfgB (Configuration Register B) Mode = 111----------------------------------------------------------------------------- 73
6.3.10 ecr (Extended Control Register) Mode = all------------------------------------------------------------------------------ 74
6.3.11 Bit Map of ECP Port Registers ------------------------------------------------------------------------------------------------ 75
6.3.12 ECP Pin Descriptions------------------------------------------------------------------------------------------------------------ 76
6.3.13 ECP Operation--------------------------------------------------------------------------------------------------------------------- 77
6.3.14 FIFO Operation-------------------------------------------------------------------------------------------------------------------- 77
6.3.15 DMA Transfers --------------------------------------------------------------------------------------------------------------------- 78
6.3.16 Programmed I/O (NON-DMA) Mode----------------------------------------------------------------------------------------- 78
6.4 EXTENSION FDD MODE (EXTFDD)------------------------------------------------------------------------------------------------ 78
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W83627SF_05 制造商:WINBOND 制造商全稱:Winbond 功能描述:WINBOND I/O
W83627SF-AW 制造商:WINBOND 制造商全稱:Winbond 功能描述:WINBOND I/O
W83627SF-PW 制造商:WINBOND 制造商全稱:Winbond 功能描述:WINBOND I/O
W83627SG-AW 功能描述:IC LPC SUPER I/O 128-PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:* 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
W83627THF 制造商:Nuvoton Technology Corp 功能描述:I/O Controller LPC Controller 128-Pin PQFP
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