
W83977EF/ CTF
PRELIMINARY
Publication Release Date: March 1999
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I
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Revision A1
Table of Contents-
GENERAL DESCRIPTION..........................................................................................1
FEATURES.................................................................................................................2
PIN CONFIGURATION ...............................................................................................5
1.0 PIN DESCRIPTION..................................................................................................................... 6
1.1 HOST INTERFACE...................................................................................................................... 6
1.2 GENERAL PURPOSE I/O PORT................................................................................................. 8
1.3 SERIAL PORT INTERFACE ........................................................................................................ 9
1.4 INFRARED INTERFACE............................................................................................................ 10
1.5 MULTI-MODE PARALLEL PORT............................................................................................... 11
1.6 FDC INTERFACE ...................................................................................................................... 16
1.7 KBC INTERFACE ...................................................................................................................... 18
1.8 POWER PINS............................................................................................................................ 18
1.9 ACPI INTERFACE ..................................................................................................................... 18
2.0 FDC FUNCTIONAL DESCRIPTION ...................................................................19
2.1 W83977EF/CTF FDC................................................................................................................. 19
2.1.1 AT interface......................................................................................................................... 19
2.1.2 FIFO (Data) ......................................................................................................................... 19
2.1.3 Data Separator .................................................................................................................... 20
2.1.4 Write Precompensation........................................................................................................ 20
2.1.5 Perpendicular Recording Mode............................................................................................ 21
2.1.6 FDC Core ............................................................................................................................ 21
2.1.7 FDC Commands.................................................................................................................. 21
2.2 REGISTER DESCRIPTIONS..................................................................................................... 33
2.2.1 Status Register A (SA Register) (Read base address + 0) ................................................... 33