參數(shù)資料
型號: W83977TF(EOL)
英文描述: W83877TF plus KBC. CIR. RTC
中文描述: W83877TF加比聯(lián)。稅務(wù)局局長。時鐘
文件頁數(shù): 104/161頁
文件大小: 592K
代理商: W83977TF(EOL)
W83977EF/ CTF
PRELIMINARY
Publication Release Date: March 1999
-95 -
Revision A1
CR24 (Default 0b1s000s0s)
Bit 7: EN16SA
= 0 12 bit Address Qualification
= 1 16 bit Address Qualification
Bit 6: EN48
= 0 The clock input on Pin 1 should be 24 Mhz.
= 1 The clock input on Pin 1 should be 48 Mhz.
The corresponding power-on setting pin is SOUTB (pin 53).
Bit 5 - 3: Reserved.
Bit 2: ENKBC
= 0 KBC is disabled after hardware reset.
= 1 KBC is enabled after hardware reset.
This bit is read only, and set/reset by power-on setting pin. The corresponding power-on
setting pin is SOUTA (pin 46).
Bit 1: Reserved
Bit 0: PNPCSV#
= 0 The Compatible PnP address select registers have default values.
= 1 The Compatible PnP address select registers have no default value.
When trying to make a change to this bit, the new value of PNPCSV# must be
complementary to the old one to make an effective change. For example, the user must set
PNPCSV# to 0 first and then reset it to 1 to reset these PnP registers if the present value of
PNPCSV# is 1. The corresponding power-on setting pin is NDTRA (pin 44).
CR25 (Default 0x00)
Bit 7 - 6: Reserved
Bit 5: URBTRI
Bit 4: URATRI
Bit 3: PRTTRI
Bit 2 - 1 : Reserved
Bit 0: FDCTRI.
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