參數(shù)資料
型號(hào)： W9812G6JH-6
廠商： WINBOND ELECTRONICS CORP
元件分類： DRAM
英文描述： 8M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO54
封裝： 0.400 INCH, ROHS COMPLIANT,TSOP2-54
文件頁(yè)數(shù)： 42/42頁(yè)
文件大小： 656K
代理商： W9812G6JH-6
W9812G6JH
Publication Release Date: Sep. 08, 2010
- 9 -
Revision A04
7.11 Burst Stop Command
A Burst Stop Command may be used to terminate the existing burst operation but leave the bank open
for future Read or Write Commands to the same page of the active bank, if the burst length is full page.
Use of the Burst Stop Command during other burst length operations is illegal. The Burst Stop
Command is defined by having RAS and CAS high with CS and WE low at the rising edge of
the clock. The data DQs go to a high impedance state after a delay which is equal to the CAS Latency
in a burst read cycle interrupted by Burst Stop.
7.12 Addressing Sequence of Sequential Mode
A column access is performed by increasing the address from the column address which is input to
the device. The disturb address is varied by the Burst Length as shown in Table 2.
Table 2 Address Sequence of Sequential Mode
DATA
ACCESS ADDRESS
BURST LENGTH
Data 0
n
BL = 2 (disturb address is A0)
Data 1
n + 1
No address carry from A0 to A1
Data 2
n + 2
BL = 4 (disturb addresses are A0 and A1)
Data 3
n + 3
No address carry from A1 to A2
Data 4
n + 4
Data 5
n + 5
BL = 8 (disturb addresses are A0, A1 and A2)
Data 6
n + 6
No address carry from A2 to A3
Data 7
n + 7
7.13 Addressing Sequence of Interleave Mode
A column access is started in the input column address and is performed by inverting the address bit
in the sequence shown in Table 3.
Table 3 Address Sequence of Interleave Mode
DATA
ACCESS ADDRESS
BURST LENGTH
Data 0
A8 A7 A6 A5 A4 A3 A2 A1 A0
BL = 2
Data 1
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 2
A8 A7 A6 A5 A4 A3 A2 A1 A0
BL = 4
Data 3
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 4
A8 A7 A6 A5 A4 A3 A2 A1 A0
BL = 8
Data 5
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 6
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 7
A8 A7 A6 A5 A4 A3 A2 A1 A0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W9812G6JH-6I 功能描述:IC SDRAM 128MBIT 54TSOPII RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:閃存 - NAND 存儲(chǔ)容量:4G（256M x 16） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP I 包裝:Digi-Reel® 其它名稱:557-1461-6
W9812G6JH-75 制造商:Winbond Electronics Corp 功能描述:8*16 SDRAM
W981616AH 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K x 2 BANKS x 16 BIT SDRAM
W981616AH-6 制造商:WINBOND 制造商全稱:Winbond 功能描述:x16 SDRAM
W981616AH-7 制造商:WINBOND 制造商全稱:Winbond 功能描述:x16 SDRAM
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