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參數(shù)資料
| 型號： | WF128K32-50H1I5A |
| 元件分類： | PROM |
| 英文描述： | 128K X 32 FLASH 5V PROM MODULE, 50 ns, CHIP66 |
| 封裝： | PGA TYPE, CERAMIC, HIP-66 |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 241K |
| 代理商： | WF128K32-50H1I5A |
10
White Microelectronics Phoenix, AZ (602) 437-1520
7
FLASH
MODULES
WF128K32-XXX5
FIG. 9
WRITE/ERASE/PROGRAM OPERATION, CS CONTROLLED
NOTES:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. D7 is the output of the complement of the data written to the device (for each chip).
4. DOUT is the output of the data written to the device.
5. Figure indicates the last two bus cycles of a four bus cycle sequence.
Addresses
WE
OE
CS
Data
5.0
V
5555H
PA
tWC
tWS
PD
D
7
D
OUT
tAH
tCPH
tCP
tDH
tDS
Data
Polling
tAS
tGHEL
A0H
tWHWH1
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