![](http://datasheet.mmic.net.cn/230000/WF2M32I-150G2UM5_datasheet_15634063/WF2M32I-150G2UM5_1.png)
1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WF2M32-XXX5
October 2004
Rev. 5
FIGURE 1 – PIN CONFIGURATION FOR WF2M32-XHX5
Top View
Block Diagram
2M x 8
8
I/O
0-7
2M x 8
8
I/O
8-15
2M x 8
8
I/O
16-23
2M x 8
8
I/O
24-31
A
0
-
20
OE#
WE1# CS1#
WE2# CS2#
WE3# CS3#
WE4# CS4#
2Mx32 5V Flash Module
FEATURES
Access Time of 90, 120, 150ns
Packaging:
66 pin, PGA Type, 1.185" square, Hermetic
Ceramic HIP (Package 401).
68 lead, Hermetic CQFP (G2U), 22.4mm (0.880")
square (Package 510) 3.56mm (0.140") height.
Designed to fit JEDEC 68 lead 0.990" CQFJ
footprint (FIGURE 3)
Sector Architecture
32 equal size sectors of 64KBytes per each 2Mx8
chip
Any combination of sectors can be erased. Also
supports full chip erase.
Minimum 100,000 Write/Erase Cycles Minimum
Organized as 2Mx32
Commercial, Industrial, and Military
Temperature Ranges
5 Volt Read and Write. 5V ± 10% Supply.
Low Power CMOS
Data# Polling and Toggle Bit feature for detection of
program or erase cycle completion.
Supports reading or programming data to a sector
not being erased.
RESET# pin resets internal state machine to the
read mode.
Built in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation, Separate Power and
Ground Planes to improve noise immunity
* This product is subject to change without notice.
Note: For programming information refer to Flash Programming 16M5 Application Note.
RESET# internally tied to V
CC
in the HIP package for this pin con-
figuration. See Alternate Pin Configuration with RESET# tied to pin
12 for system control of reset (FIGURE 10, page 11).
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
A
18
I/O
0
I/O
1
I/O
2
WE
2#
CS
2#
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1#
A
19
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE#
A
17
WE
1#
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
A
20
A
13
A
8
I/O
16
I/O
17
I/O
18
V
CC
CS
4#
WE
4#
I/O
27
A
4
A
5
A
6
WE
3#
CS
3#
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
I/O
22
I/O
21
I/O
20
11 22 33 44 55 66
1 12 23 34 45 56
Pin Description
I/O0-31
Data Inputs/Outputs
A0-20
Address Inputs
WE1-4#
Write Enables
CS1-4#
Chip Selects
OE#
Output Enable
VCC
Power Supply
GND
Ground