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參數(shù)資料
| 型號： | WMS128K8L-17DRM |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 17 ns, CDSO32 |
| 封裝： | CERAMIC, SOJ-32 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 489K |
| 代理商： | WMS128K8L-17DRM |
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WMS128K8-XXX
September 2002
Rev. 5
White Electronic Designs Corp. reserves the right to change products or specications without notice.
AC CHARACTERISTICS
VCC = 5.0V, GND = 0V, -55°C TA < 125°C
Parameter Read Cycle
Symbol
-15
-17
-20
-25
-35
-45
-55
Unit
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
Read Cycle Time
tRC
15
17
20
25
35
45
55
ns
Address Access Time
tAA
15
17
20
25
35
45
55
ns
Output Hold from Address Change
tOH
0000000
ns
Chip Select Access Time
tACS
15
17
20
25
35
45
55
ns
Output Enable to Output Valid
tOE
10
12
15
20
25
30
ns
Chip Select to Output in Low Z
tCLZ1
3333333
ns
Output Enable to Output in Low Z
tOLZ1
0000000
ns
Chip Disable to Output in High Z
tCHZ1
10
12
20
ns
Output Disable to Output in High Z
tOHZ1
10
12
20
ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
VCC = 5.0V, GND = 0V, -55°C TA < 125°C
Parameter Write Cycle
Symbol
-15
-17
-20
-25
-35
-45
-55
Unit
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
Write Cycle Time
tWC
15
17
20
25
35
45
55
ns
Chip Select to End of Write
tCW
14
15
20
25
30
45
ns
Address Valid to End of Write
tAW
14
15
20
25
30
45
ns
Data Valid to End of Write
tDW
10
12
15
20
25
ns
Write Pulse Width
tWP
14
15
20
25
30
45
ns
Address Setup Time
tAS
0000000
ns
Address Hold Time
tAH
0000000
ns
Output Active from End of Write
tOW1
3333444
ns
Write Enable to Output in High Z
tWHZ1
10
12
15
20
25
ns
Data Hold Time
tDH
0000000
ns
1. This parameter is guaranteed by design but not tested.
AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75Ω.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
Current Source
IOL
IOH
Ceff = 50 pF
D.U.T.
VZ
≈ 1.5V
(Bipolar Supply)
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