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參數(shù)資料
| 型號： | WMS512K8L-35DJMA |
| 元件分類： | SRAM |
| 英文描述： | 512K X 8 STANDARD SRAM, 35 ns, CDSO36 |
| 封裝： | CERAMIC, SOJ-36 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 114K |
| 代理商： | WMS512K8L-35DJMA |
2
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WMS512K8-XXX
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Min
Max
Unit
Operating Temperature
TA
-55
+125
°C
Storage Temperature
TSTG
-65
+150
°C
Signal Voltage Relative to GND
VG
-0.5
Vcc+0.5
V
Junction Temperature
TJ
150
°C
Supply Voltage
VCC
-0.5
7.0
V
CS
OE
WE
Mode
Data I/O
Power
H
X
Standby
High Z
Standby
L
H
Read
Data Out
Active
L
X
L
Write
Data In
Active
L
H
Out Disable
High Z
Active
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
Supply Voltage
VCC
4.5
5.5
V
Input High Voltage
VIH
2.2
VCC + 0.3
V
Input Low Voltage
VIL
-0.3
+0.8
V
Operating Temp. (Mil.)
TA
-55
+125
°C
DC CHARACTERISTICS
(VCC = 5.0V, GND = 0V, TA = -55
°C to +125°C)
Parameter
Sym
Conditions
Units
Min
Max
Input Leakage Current
ILI
VCC = 5.5, VIN = GND to VCC
10
A
Output Leakage Current
ILO
CS = VIH, OE = VIH, VOUT = GND to VCC
10
A
Operating Supply Current*
ICC
CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5
160
mA
Standby Current
ISB
CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5
15
mA
Output Low Voltage
VOL
IOL = 8mA for 17 - 35ns,
0.4
V
IOL = 2.1mA for 45 - 55ns, VCC = 4.5
Output High Voltage
VOH
IOH = -4.0mA for 17 - 35ns,
2.4
V
IOH = -1.0mA for 45 - 55ns, VCC = 4.5
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
* Not 100% duty cycle
CAPACITANCE
(TA = +25
°C)
Parameter
Symbol
Condition
Package
Speed (ns)
Max
Unit
Input capacitance
CIN
VIN = 0V, f = 1.0MHz
32 Pin CSOJ, DIP,
15 to 55
20
pF
Flat Pack Evolutionary
32 Pin CLCC
15 to 55
15
pF
15 to 35
12
pF
45 to 55
20
pF
Output capicitance
COUT
VOUT = 0V, f = 1.0MHz
32 Pin CSOJ, DIP,
15 to 55
20
pF
Flat Pack Evolutionary
15 to 35
12
pF
45 to 55
20
pF
This parameter is guaranteed by design but not tested.
36 Pin CSOJ & Flat Pack
Revolutionary
Parameter
Symbol
Conditions
Units
Min
Max
Data Retention Supply Voltage
VDR
CS
≥ VCC -0.2V
2.0
5.5
V
Low Power Data Retention
ICCDR1
VCC = 3V
7
mA
Low Power Data Retention
ICCDR2
VCC = 2V
2
mA
DATA RETENTION CHARACTERISTICS FOR LOW POWER “L” VERSION
36 Pin CSOJ & Flat Pack
Revolutionary
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WMS512K8L-45DJM | 512K X 8 STANDARD SRAM, 45 ns, CDSO36 |
| WMS512K8-45CLI | 512K X 8 STANDARD SRAM, 45 ns, CQCC32 |
| WMS512K8L-55FEIA | 512K X 8 STANDARD SRAM, 55 ns, CDFP32 |
| WMS512K8-15FEC | 512K X 8 STANDARD SRAM, 15 ns, CDFP32 |
| WMS512K8-17FEM | 512K X 8 STANDARD SRAM, 17 ns, CDFP32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WMS512K8L-35DJQ | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512Kx8 MONOLITHIC SRAM, SMD 5962-95613 |
| WMS512K8L-35DJQA | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512Kx8 MONOLITHIC SRAM, SMD 5962-95613 |
| WMS512K8L-35FC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512Kx8 MONOLITHIC SRAM |
| WMS512K8L-35FCA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512Kx8 MONOLITHIC SRAM |
| WMS512K8L-35FEC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512Kx8 MONOLITHIC SRAM |
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