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參數(shù)資料
| 型號： | WS512K32-120G2TQA |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | SRAM |
| 英文描述： | 512K X 32 MULTI DEVICE SRAM MODULE, 120 ns, CQFP68 |
| 封裝： | 22.40 X 22.40 MM, 4.57 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大小： | 317K |
| 代理商： | WS512K32-120G2TQA |
WS512K32-XXX
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
March 2005
Rev. 4
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75
Ω.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
Current Source
VZ
1.5V
(Bipolar Supply)
D.U.T.
Ceff+50pf
IOL
IOH
Current Source
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
AC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C
Parameter
Symbol
-70
-85
-100
-120
Units
Write Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
tWC
70
85
100
120
ns
Chip Select to End of Write
tCW
60
75
80
100
ns
Address Valid to End of Write
tAW
60
75
80
100
ns
Data Valid to End of Write
tDW
30
40
ns
Write Pulse Width
tWP
50
60
ns
Address Setup Time
tAS
0000
ns
Address Hold Time
tAH
5555
ns
Output Active from End of Write
tOW1
5555
ns
Write Enable to Output in High Z
tWHZ1
25
35
ns
Data Hold from Write Time
tDH
0000
ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C
Parameter
Symbol
-70
-85
-100
-120
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
tRC
70
85
100
120
ns
Address Access Time
tAA
70
85
100
120
ns
Output Hold from Address Change
tOH
5555
ns
Chip Select Access Time
tACS
70
85
100
120
ns
Output Enable to Output Valid
tOE
35
40
50
60
ns
Chip Select to Output in Low Z
tCLZ1
10
ns
Output Enable to Output in Low Z
tOLZ1
5555
ns
Chip Disable to Output in High Z
tCHZ1
25
35
ns
Output Disable to Output in High Z
tOHZ1
25
35
ns
1. This parameter is guaranteed by design but not tested.
FIGURE 2 – AC TEST CIRCUIT
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