參數(shù)資料
型號(hào)： X1209
英文描述： Real Time Clock/Calendar with Event/Timestamp Detection & Alarms(帶有事件/時(shí)間標(biāo)記檢測(cè)與報(bào)警功能的實(shí)時(shí)時(shí)鐘/日歷)
中文描述： 實(shí)時(shí)時(shí)鐘/日歷的事件/時(shí)間戳檢測(cè)
文件頁(yè)數(shù)： 22/27頁(yè)
文件大?。?/td> 511K
代理商： X1209
Preliminary Information
X1209
22 of 27
REV 3.0 2/11/04
www.xicor.com
Figure 7. Byte Write Sequence
Read Operations
There are three basic read operations: Current
Address Read, Random Read, and Sequential Read.
Current Address Read
Internally the X1209 contains an address counter that
maintains the address of the last word read incre-
mented by one. Therefore, if the last read was to
address n, the next read operation would access data
from address n+1. Upon receipt of the Slave Address
Byte with the R/W bit set to one, the X1209 issues an
acknowledge, then transmits eight data bits. The mas-
ter terminates the read operation by not responding
with an acknowledge during the ninth clock and issuing
a stop condition. Refer to Figure 8 for the address,
acknowledge, and data transfer sequence.
Figure 8. Current Address Read Sequence
Figure 9. Acknowledge Polling Sequence
It should be noted that the ninth clock cycle of the read
operation is not a “don’t care.” To terminate a read
operation, the master must either issue a stop condi-
tion during the ninth cycle or hold SDA HIGH during
the ninth clock cycle and then issue a stop condition.
S
t
a
r
t
S
t
o
p
Slave
Address
Word
Address 1
Data
A
C
K
A
C
K
A
C
K
SDA Bus
Signals From
The Slave
Signals from
the Master
0
A
C
K
Word
Address 0
1
1
1
1
0 0 0 0 0 0 0 0
1 0 1
S
t
a
r
t
S
t
o
p
Slave
Address
Data
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
1
1
1
1
1
1
0
1
ACK
returned
Issue Slave
Address Byte
(Read or Write)
Byte load completed
by issuing STOP.
Enter ACK Polling
Issue STOP
Issue START
NO
YES
Issue STOP
NO
Continue normal
Read or Write
command
sequence
PROCEED
YES
write
Cycle complete. Continue
command sequence
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