X1240
4
Table 1. Clock/Control Memory Map
Addr.
Type
Reg
Name
Bit
Range
F
S
7
6
5
4
3
2
1
0
(optional)
003F
Status
SR
BAT
0
0
0
0
RWEL
WEL
RTCF
0037
RTC
(SRAM)
Y2K
0
0
Y2K21
Y2K20
Y2K13
0
0
Y2K10
19/20
0036
DW
0
0
0
0
0
DY2
DY1
DY0
0-6
0035
YR
Y23
Y22
Y21
Y20
Y13
Y12
Y11
Y10
0-99
0034
MO
0
0
0
G20
G13
G12
G11
G10
1-12
0033
DT
0
0
D21
D20
D13
D12
D11
D10
1-31
0032
HR
MIL
0
H21
H20
H13
H12
H11
H10
0-23
0031
MN
0
M22
M21
M20
M13
M12
M11
M10
0-59
0030
SC
0
S22
S21
S20
S13
S12
S11
S10
0-59
0011
Control
(E2PROM)
INT
0
0
0
0
0
0
0
0
00h
0010
BL
BP2
BP1
BP0
0
0
0
0
0
00h
REAL TIME CLOCK REGISTERS
Year 2000 (Y2K)
The X1240 has a century byte that “rolls over” from 19
to 20 when the years byte changes from 99 to 00. The
Y2K byte can contain only the values of 19 or 20.
Day of the Week Register (DW)
This register provides a Day of the Week status and
uses three bits DY2 to DY0 to represent the seven
days of the week. The counter advances in the cycle
0-1-2-3-4-5-6-0-1-2-... The assignment of a numerical
value to a specific day of the week is arbitrary and may
be decided by the system software designer. The
Clock Default values define 0=Sunday.
Clock/Calendar Registers (YR, MO, DT, HR, MN, SC)
These registers depict BCD representations of the
time. As such, SC (Seconds) and MN (Minutes) range
from 00 to 59, HR (Hour) is 1 to 12 with an AM or PM
indicator (H21 bit) or 0 to 23 (with MIL=1), DT (Date) is
1 to 31, MO (Month) is 1 to 12, YR (year) is 0 to 99.
24 Hour Time
If the MIL bit of the HR register is 1, the RTC will use a
24-hour format. If the MIL bit is 0, the RTC will use 12-
hour format and bit H21 will function as an AM/PM
indicator with a ‘1’ representing PM. The clock defaults
to Standard Time with H21=0.
Leap Years
Leap years add the day February 29 and are defined
as those years that are divisible by 4. Years divisible
by 100 are not leap years, unless they are also divisi-
ble by 400. This means that the year 2000 is a leap
year, the year 2100 is not. The X1240 does not correct
for the leap year in the year 2100.
STATUS REGISTER (SR)
The Status Register is located in the RTC area at
address 003FH. This is a volatile register only and is
used to control the WEL and RWEL write enable
latches, and read a Low Voltage Sense bit. This regis-
ter is logically seperated from both the array and the
Clock/Control Registers (CCR).
Table 2. Status Register (SR)
BAT: Battery Supply—Volatile
This bit set to “1” indicates that the device is operating
from V
BACK
, not V
CC
. It is a read only bit and is set/
reset by hardware.
Addr
7
6
5
4
3
2
1
0
003Fh
BAT
0
0
0
0
RWEL
WEL
RTCF
Default
0
0
0
0
0
0
0
0