參數(shù)資料
型號(hào): X1286V14Z
廠商: INTERSIL CORP
元件分類: XO, clock
英文描述: Intersil Real Time Clock/Calendar/CPU Supervisor with EEPROM
中文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO14
封裝: 4.40 MM, ROHS COMPLIANT, PLASTIC, TSSOP-14
文件頁數(shù): 7/25頁
文件大?。?/td> 474K
代理商: X1286V14Z
7
FN8101.1
April 14, 2006
Write Cycle Timing
Power-up Timing
Notes: (1) Delays are measured from the time V
CC
is stable until the specified operation can be initiated. These parameters are not 100% tested.
V
CC
slew rate should be between 0.2mV/μsec and 50mV/μsec.
(2) Typical values are for T
A
= 25°C and V
CC
= 5.0V
Nonvolatile Write Cycle Timing
Note:
(1) t
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is
the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
Symbol
t
PUR(1)
t
PUW(1)
Parameter
Min.
Typ.
(2)
Max.
1
5
Units
ms
ms
Time from Power-up to Read
Time from Power-uppower-up to Write
Symbol
t
WC(1)
Parameter
Min.
Typ.
(1)
5
Max.
10
Units
ms
Write Cycle Time
SCL
SDA
t
WC
8th Bit of Last Byte
ACK
Stop
Condition
Start
Condition
X1286
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