參數(shù)資料
型號(hào): X1288V14Z-2.7
廠商: INTERSIL CORP
元件分類: XO, clock
英文描述: 2-Wire⑩ RTC Real Time Clock/Calendar/CPU Supervisor with EEPROM
中文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO14
封裝: ROHS COMPLIANT, PLASTIC, TSSOP-14
文件頁數(shù): 7/27頁
文件大小: 425K
代理商: X1288V14Z-2.7
7
FN8102.3
April 14, 2006
Power-up Timing
Notes: (1) Delays are measured from the time V
CC
is stable until the specified operation can be initiated. These parameters are not 100% tested.
V
CC
slew rate should be between 0.2mV/μsec and 50mV/μsec.
(2) Typical values are for T
A
= 25°C and V
CC
= 5.0V
Nonvolatile Write Cycle Timing
Note:
(1) t
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
WATCHDOG TIMER/LOW VOLTAGE RESET OPERATING CHARACTERISTICS
Watchdog/Low Voltage Reset Parameters (See Figures 3 and 4)
Symbol
t
PUR(1)
t
PUW(1)
Parameter
Min.
Typ.
(2)
Max.
1
5
Units
ms
ms
Time from Power-up to Read
Time from Power-up to Write
Symbol
t
WC(1)
Parameter
Min.
Typ.
(1)
5
Max.
10
Units
ms
Write Cycle Time
Symbols
V
PTRIP
Parameters
Min.
Typ.
Max.
Unit
V
Programmed Reset Trip Voltage
X1288-4.5A
X1288
X1288-2.7A
X1288-2.7
V
CC
Detect to RESET LOW
Power-up Reset Time-out Delay
4.50
4.25
2.75
2.55
4.63
4.38
2.85
2.65
4.75
4.50
2.95
2.75
500
400
t
RPD
t
PURST
ns
ms
100
250
t
F
t
R
V
CC
Fall Time
V
CC
Rise Time
Watchdog Timer Period (Crystal=32.768kHz):
WD1=0, WD0=0, (default)
WD1=0, WD0=1
WD1=1, WD0=0
10
10
μs
μs
t
WDO
1.7
725
225
225
1
1.0
1.75
750
250
250
1.8
775
275
275
s
ms
ms
ms
μs
V
t
RST
t
RSP
V
RVALID
Watchdog Reset Time-out Delay (Crystal=32.768kHz)
2-Wire interface
Reset Valid V
CC
X1288
相關(guān)PDF資料
PDF描述
X1288V14Z-2.7A 2-Wire⑩ RTC Real Time Clock/Calendar/CPU Supervisor with EEPROM
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