FN8102.3 April 14, 2006 VTRIP Programming Timing Diagram " />
參數(shù)資料
型號(hào): X1288V14Z
廠商: Intersil
文件頁數(shù): 26/27頁
文件大?。?/td> 0K
描述: IC RTC/CAL/CPU SUP EE 14-TSSOP
標(biāo)準(zhǔn)包裝: 95
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào)器,閏年,監(jiān)控器,監(jiān)視計(jì)時(shí)器
時(shí)間格式: HH:MM:SS:hh(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 4.5 V ~ 5.5 V
電壓 - 電源,電池: 1.8 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
8
FN8102.3
April 14, 2006
VTRIP Programming Timing Diagram
VTRIP Programming Parameters
DESCRIPTION
The X1288 device is a Real Time Clock with
clock/calendar, two polled alarms with integrated 32kx8
EEPROM, oscillator compensation, CPU Supervisor
(POR/LVS and WDT) and battery backup switch.
The oscillator uses an external, low-cost 32.768kHz
crystal. All compensation and trim components are
integrated on the chip. This eliminates several external
discrete components and a trim capacitor, saving board
area and component cost.
The Real-Time Clock keeps track of time with separate
registers for Hours, Minutes, Seconds and 1/100 of a
second. The Calendar has separate registers for Date,
Month, Year and Day-of-week. The calendar is correct
through 2099, with automatic leap year correction.
The
powerful
Dual Alarms
can
be
set
to
any
Clock/Calendar value for a match. For instance, every
minute, every Tuesday, or 5:23 AM on March 21. The
alarms can be polled in the Status Register or provide a
hardware interrupt (IRQ Pin). There is a repeat mode for
the alarms allowing a periodic interrupt.
The PHZ/IRQ pin may be software selected to provide a
frequency output of 1 Hz, 100 Hz, or 32,768 Hz.
The X1288 device integrates CPU Supervisor func-tions
and a Battery Switch. There is a Power-On Reset
(RESET output) with typically 250 ms delay from power-
on. It will also assert RESET when Vcc goes below the
specified threshold. The Vtrip threshold is user repro-
grammable. There is a WatchDog Timer (WDT) with 3
selectable time-out periods (0.25s, 0.75s, 1.75s) and a
disabled setting. The watchdog activates the RESET pin
when it expires.
Parameter
Description
Min.
Max.
Units
tVPS
VTRIP Program Enable Voltage Setup time
1
s
tVPH
VTRIP Program Enable Voltage Hold time
1
s
tTSU
VTRIP Setup time
1
s
tTHD
VTRIP Hold (stable) time
10
ms
tVPO
VTRIP Program Enable Voltage Off time
(Between successive adjustments)
0s
tRP
VTRIP Program Recovery Period
(Between successive adjustments)
10
ms
VP
Programming Voltage
14
16
V
VTRAN
VTRIP Programmed Voltage Range
1.7
5.0
V
Vtv
VTRIP Program variation after programming
(Programmed at 25°C)
-25
+25
mV
VTRIP programming parameters are not 100% Tested.
01 2 3 4 5 6 7
0 1 2 345 67
0 1 2 3 45 6 7
0 1 2 3 4 5 67
VCC
(VTRIP)
tVPH
tVPS
tVPO
tRP
SCL
SDA
AEh
03h/01h
RESET
VP = 15V
00h
VCC
tTSU
tTHD
VTRIP
X1288
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