參數(shù)資料
型號: X20C17P-35
英文描述: CAT5 SHLD, PVC PATCH CBL STRGHT PIN, 100 MHZ-RED
中文描述: 高速自動存儲⑩NOVRAM
文件頁數(shù): 1/11頁
文件大?。?/td> 47K
代理商: X20C17P-35
X20C17
1
Xicor, Inc. 1992, 1995 Patents Pending
2015-2.5 8/1/97 T1/C0/D0 SH
Characteristics subject to change without notice
AUTOSTORE NOVRAM is a trademark of Xicor, Inc.
High Speed AUTOSTORE NOVRAM
DESCRIPTION
The Xicor X20C17 is a 2K x 8 NOVRAM featuring a high-
speed static RAM overlaid bit-for-bit with a nonvolatile
electrically erasable PROM (E
2
PROM) and the
AUTOSTORE feature which automatically saves the
RAM contents to E
2
PROM at power-down. The X20C17
is fabricated with advanced CMOS floating gate technol-
ogy to achieve high speed with low power and wide
power-supply margin. The X20C17 features a compat-
ible JEDEC approved byte-wide memory pinout for
industry standard SRAMs.
The NOVRAM design allows data to be easily trans-
ferred from RAM to E
2
PROM (store) and E
2
PROM to
RAM (recall). The store operation is completed in 2.5ms
or less. An automatic array recall operation reloads the
contents of the E
2
PROM into RAM upon power-up.
Xicor NOVRAMS are designed for unlimited write
operations to RAM, either from the host or recalls from
E
2
PROM, and a minimum 1,000,000 store operations to
the E
2
PROM. Data retention is specified to be greater
than 100 years.
FEATURES
24-Pin Standard SRAM DIP Pinout
Fast Access Time: 35ns, 45ns, 55ns
High Reliability
—Endurance: 1,000,000 Nonvolatile Store
Operations
—Retention: 100 Years Minimum
AUTOSTORE NOVRAM
—Automatically Stores SRAM Data Into the
E
2
PROM Array When V
CC
Low Threshold is
Detected
—E
2
PROM Data Automatically Recalled Into
RAM Upon Power-up
Low Power CMOS
—Standby: 250
μ
A
Infinite E
2
PROM Array Recall, and RAM Read
and Write Cycles
16K
X20C17
2K x 8 Bit
PIN CONFIGURATION
2015 ILL F02.1
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1
VCC
A8
A9
WE
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
X20C17
2
3
4
5
6
7
8
9
10
11
12
22
23
24
21
20
19
18
17
16
15
14
13
PLASTIC
A
PPLICATION
N
OTE
A V A I L A B L E
AN56
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