參數(shù)資料
型號： X20C17PM-55
英文描述： LOCKNUT, ZINC-PLATED, 1" RoHS Compliant: Yes
中文描述： 高速自動存儲⑩NOVRAM
文件頁數(shù)： 2/11頁
文件大小： 47K
代理商： X20C17PM-55
X20C17
2
PIN DESCRIPTIONS
Addresses (A
0
–A
10
)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (
CE
)
The Chip Enable input must be LOW to enable all read/
write operations. When
CE
is HIGH, power consumption
is reduced.
Output Enable (
OE
)
The Output Enable input controls the data output buffers
and is used to initiate read and recall operations. Output
Enable LOW disables a store operation regardless of
the state of
CE
,
WE
.
Data In/Data Out (I/O
0
–I/O
7
)
Data is written to or read from the X20C17 through the
I/O pins. The I/O pins are placed in the high impedance
state when either
CE
or
OE
is HIGH.
Write Enable (
WE
)
The Write Enable input controls the writing of data to the
static RAM.
FUNCTIONAL DIAGRAM
2015 FHD F01.1
PIN NAMES
Symbol
A
0
–A
10
I/O
0
–I/O
7
WE
CE
OE
V
CC
V
SS
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
+5V
Ground
2015 PGM T01
VCC SENSE
ROW
SELECT
CONTROL
LOGIC
COLUMN
SELECT
&
I/OS
EEPROM ARRAY
HIGH SPEED
2K x 8
SRAM
ARRAY
CE
OE
WE
A3–A8
I/O0–I/O7
A0–A2
A9–A10
RECALL
STORE
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