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參數(shù)資料
| 型號： | X24001SM-3 |
| 英文描述： | Identi⑩PROM |
| 中文描述： | 認(rèn)⑩胎膜早破 |
| 文件頁數(shù)： | 4/13頁 |
| 文件大?。?/td> | 47K |
| 代理商： | X24001SM-3 |
4
X24001
Programming Operation
Programming of the X24001 is performed one byte at a
time. After each byte is written, a delay equal to the write
cycle time of 5ms must be observed before initiating the
next write cycle.
The sequence of operations is: first raise the SCL pin to
V
PGM
and generate a HIGH to LOW transition of SDA
(programming mode start). This is followed by eight bits
of data containing the program command bits, four
address bits and two don’t care bits, immediately fol-
lowed by the 8-bit data byte.
The timing of the operation conforms to the standard
A.C. timing requirements and follows the sequence
shown below. After generating the Programming Mode
start condition the SCL HIGH level can be either V
IH
or V
PGM
.
Factory Programming Service
The X24001 can be programmed with customer specific
data prior to shipment. The data programmed can be in
two forms: static data pattern where there is no change
in the data in a group of devices or sequential data, such
as a base number incremented by one for each device
tested and shipped.
Customers requiring one of these services should con-
tact their local sales office for ordering procedures and
service charges.
Figure 3. Programming Sequence
VPGM
VIH
SDA
0
1
A3 A2 A1 A0 XX XX D7 D6 D5 D4 D3 D2 D1 D0
S
T
A
R
T
SCL
3830 FHD F05.1
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