X24256
Characteristics subject to change without notice.
10 of 18
CAPACITANCE
T
A
= +25°C, f = 1MHz, V
CC
= 5V
Notes:
(1) The device enters the Active state after any start, and remains active until: 9 clock cycles later if the Device Select Bits in the Slave Address Byte are
incorrect; 200ns after a stop ending a read operation; or t
after a stop ending a write operation.
(2) The device goes into Standby: 200ns after any stop, except those that initiate a high voltage write cycle; t
cycle; or 9 clock cycles after any start that is not followed by the correct Device Select Bits in the Slave Address Byte.
(3) VIL Min. and VIH Max. are for reference only and are not tested.
after a stop that intiates a high voltage
Symbol
Parameter
Max.
Units
Test Conditions
C
I/O
(3)
Input/Output Capacitance (SDA)
8
pF
V
I/O
= 0V
C
IN
(3)
Input Capacitance (S
0
μ
s
, S
1
, SCL, WP)
6
pF
V
IN
= 0V
A.C. CONDITIONS OF TEST
EQUIVALENT A.C. LOAD CIRCUIT
Input Pulse Levels
V
CC
x 0.1 to V
CC
x 0.9
Input Rise and Fall Times
Input and Output Timing
Levels
Output Load
10ns
V
CC
X 0.5
Standard Output Load
5V
1.53K
100pF
OUTPUT
for V
OL
= 0.4V
I
OL
= 3mA
A.C. OPERATING CHARACTERISTICS
(Over the recommended operating conditions, unless otherwise stated.
Read & Write Cycle Limits
Symbol
f
SCL
t
IN
t
AA
Parameter
V
CC
1.8V
V
CC
2.5V
Units
Min.
Max.
Min.
Max.
SCL Clock Frequency
0
100
0
400
KHz
Pulse width Suppression Time at Inputs
n/a
n/a
50
ns
SCL LOW to SDA Data Out Valid
0.3
3.5
0.1
0.9
μ
s
t
BUF
Time the Bus Must Be Free Before a
New Transmission Can Start
4.7
1.3
μ
s
t
LOW
t
HIGH
t
SU:STA
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
DH
t
R
Clock LOW Period
4.7
1.3
μ
s
Clock HIGH Period
4.0
0.6
μ
s
Start Condition Setup Time
4.7
0.6
μ
s
Start Condition Hold Time
4.0
0.6
μ
s
Data In Setup Time
250
100
ns
Data In Hold Time
0
0
μ
s
Stop Condition Setup Time
4.7
0.6
Data Output Hold Time
300
50
ns
SDA and SCL Rise Time
1000
20+ .1Cb
(3)
300
ns
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