參數(shù)資料
型號(hào): X24640V20I-1.8
英文描述: 400KHz 2-Wire Serial E 2 PROM with Block Lock
中文描述: 400kHz的2線串行E的2座鎖胎膜早破
文件頁數(shù): 3/17頁
文件大?。?/td> 85K
代理商: X24640V20I-1.8
X24640
3
DEVICE OPERATION
The device supports a bidirectional bus oriented
protocol. The protocol defines any device that sends
data onto the bus as a transmitter, and the receiving
device as the receiver. The device controlling the
transfer is a master and the device being controlled is
the slave. The master will always initiate data trans-
fers, and provide the clock for both transmit and
receive operations. Therefore, the device will be
considered a slave in all applications.
Clock and Data Conventions
Data states on the SDA line can change only during
SCL LOW. SDA state changes during SCL HIGH are
reserved for indicating start and stop conditions. Refer
to Figures 1 and 2.
Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL
is HIGH. The device continuously monitors the SDA
and SCL lines for the start condition and will not
respond to any command until this condition has been
met.
SCL
SDA
DATA STABLE
DATA
CHANGE
7038 FM 03
SCL
SDA
START BIT
STOP BIT
7038 FM 04
Figure 1. Data Validity
Figure 2. Definition of Start and Stop
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X24640V20I 400KHz 2-Wire Serial E 2 PROM with Block Lock
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