- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371205 > X24C08PI-3 Serial E2PROM PDF資料下載
參數(shù)資料
| 型號： | X24C08PI-3 |
| 英文描述： | Serial E2PROM |
| 中文描述： | 串行E2PROM |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 62K |
| 代理商： | X24C08PI-3 |
X24C08
5
The next bit addresses a particular device. A system
could have up to two X24C08 devices on the bus (see
Figure 10). The two addresses are defined by the state
of the A2 input.
The next two bits of the slave address field are an
extension of the array’s address and are concatenated
with the eight bits of address in the word address field,
providing direct access to the whole 1024 x 8 array.
DEVICE ADDRESSING
Following a start condition the master must output the
address of the slave it is accessing. The most significant
four bits of the slave address are the device type
identifier (see Figure 4). For the X24C08 this is fixed as
1010[B].
Figure 4. Slave Address
The last bit of the slave address defines the operation to
be performed. When set to one a read operation is
selected, when set to zero a write operation is selected.
Following the start condition, the X24C08 monitors the
SDA bus comparing the slave address being transmit-
ted with its slave address (device type and state of A
2
input.) Upon a correct compare the X24C08 outputs an
acknowledge on the SDA line. Depending on the state
of the R/W bit, the X24C08 will execute a read or write
operation.
WRITE OPERATIONS
Byte Write
For a write operation, the X24C08 requires a second
address field. This address field is the word address,
comprised of eight bits, providing access to any one of
1024 words in the array. Upon receipt of the word
address the X24C08 responds with an acknowledge,
and awaits the next eight bits of data, again responding
with an acknowledge. The master then terminates the
transfer by generating a stop condition, at which time the
X24C08 begins the internal write cycle to the nonvolatile
memory. While the internal write cycle is in progress the
X24C08 inputs are disabled, and the device will not
respond to any requests from the master. Refer to
Figure 5 for the address, acknowledge and data transfer
sequence.
3842 FHD F09
Figure 5. Byte Write
BUS ACTIVITY:
MASTER
SDA LINE
BUS ACTIVITY:
X24C08
S
T
A
R
T
SLAVE
ADDRESS
S
S
T
O
P
P
A
C
K
A
C
K
A
C
K
WORD
ADDRESS
DATA
3842 FHD F10
1
0
A2
A1
A0
R/W
DEVICE TYPE
IDENTIFIER
DEVICE
ADDRESS
1
0
HIGH
ORDER
WORD
ADDRESS
相關PDF資料 |
PDF描述 |
|---|---|
| X24C08PI-3.5 | Serial E2PROM |
| X24C08S8-2.7 | Serial E2PROM |
| X24C16-1.8 | I2C Serial EEPROM |
| X24C16-2.5 | I2C Serial EEPROM |
| X24C16-3 | 150V Single N-Channel HEXFET Power MOSFET in a D2-Pak package; A IRF3415S with Standard Packaging |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| X24C08PI-3.5 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C08PIG | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C08PIG-2.7 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C08PIG-3 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C08PIG-3.5 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
發(fā)布緊急采購，3分鐘左右您將得到回復。