參數(shù)資料
型號: X25057MI
英文描述: Controller IC; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes
中文描述: 5MHz的低功耗SPI串行e的2 IDLock⑩記憶胎膜早破
文件頁數(shù): 2/16頁
文件大?。?/td> 74K
代理商: X25057MI
X25057
2
PIN DESCRIPTIONS
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked out
by the falling edge of the serial clock.
Serial Input (SI)
SI is a serial data input pin. All opcodes, byte addresses,
and data to be written to the memory are input on this
pin. Data is latched by the rising edge of the serial clock.
Serial Clock (SCK)
The Serial Clock controls the serial bus timing for data
input and output. Opcodes, addresses, or data present
on the SI pin are latched on the rising edge of the clock
input, while data on the SO pin change after the falling
edge of the clock input.
Chip Select (CS)
When CS is HIGH, the X25057 is deselected and the SO
output pin is at high impedance and unless an internal
write operation is underway, the X25057 will be in the
standby power mode. CS LOW enables the X25057,
placing it in the active power mode. It should be noted
that after power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Write Protect (WP)
When WP is LOW, nonvolatile writes to the X25057 are
disabled, but the part otherwise functions normally. When
WP is held HIGH, all functions, including nonvolatile
writes operate normally. WP going LOW while CS is still
LOW will interrupt a write to the X25057. If the internal
write cycle has already been initiated, WP going low will
have no affect on this write.
PIN NAMES
7033 FRM T01
PIN CONFIGURATION
PRINCIPLES OF OPERATION
The X25057 is a 512 x 8 E
directly with the synchronous Serial Peripheral Interface
(SPI) of many popular microcontroller families.
2
PROM designed to interface
The X25057 contains an 8-bit instruction register. It is
accessed via the SI input, with data being clocked in on
the rising edge of SCK. CS must be LOW and the WP
input must be HIGH during the entire operation. Table 1
contains a list of the instructions and their opcodes. All
instructions, addresses and data are transferred MSB first.
Data input is sampled on the first rising edge of SCK
after CS goes LOW. SCK is static, allowing the user to
stop the clock and then start it again to resume opera-
tions where left off.
Symbol
Description
CS
SO
SI
SCK
WP
V
SS
V
CC
NC
Chip Select Input
Serial Output
Serial Input
Serial Clock Input
Write Protect Input
Ground
Supply Voltage
No Connect
VCC
NC
SI
SCK
7033 FRM F02.1
SO
CS
VSS
WP
1
2
3
4
8
7
6
5
8 Lead MSOP
SCK
SI
VSS
WP
7033 FRM F02.2
NC
VCC
CS
SO
1
2
3
4
8
7
6
5
8 Lead TSSOP
VCC
NC
SCK
SI
7033 FRM F02
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
8 Lead SOIC/PDIP
X25057
X25057
X25057
*0.197"
*0.244"
0.120"
0.193"
0.122"
0.252"
Not to scale
*SOIC Measurement
相關(guān)PDF資料
PDF描述
X25057P Pulse Width Modulation (PWM) Controller IC; Topology:Buck (Step Down); Number of PWM Outputs:4; Input Voltage Primary Min:1.8V; Input Voltage Primary Max:25V; Package/Case:28-TSSOP; Leaded Process Compatible:No
X25057PI Pulse Width Modulation (PWM) Controller IC; Topology:Buck (Step Down); Number of PWM Outputs:4; Input Voltage Primary Min:1.8V; Input Voltage Primary Max:25V; Package/Case:28-TSSOP; Leaded Process Compatible:Yes
X25057S Controller IC; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No
X25057SI 5MHz Low Power SPI Serial E 2 PROM with IDLock⑩ Memory
X25057V 5MHz Low Power SPI Serial E 2 PROM with IDLock⑩ Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
X25057MI-1.8 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:5MHz Low Power SPI Serial E 2 PROM with IDLock⑩ Memory
X25057MI-2.7 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:5MHz Low Power SPI Serial E 2 PROM with IDLock⑩ Memory
X25057MIG-1.8 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:5MHz Low Power SPI Serial E2PROM with IDLock⑩ Memory
X25057MIG-2.7 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:5MHz Low Power SPI Serial E2PROM with IDLock⑩ Memory
X25057P 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:5MHz Low Power SPI Serial E 2 PROM with IDLock⑩ Memory