- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371212 > X25128SI-2.7 SPI Serial E 2 PROM with Block Lock TM Protection PDF資料下載
參數(shù)資料
| 型號： | X25128SI-2.7 |
| 英文描述： | SPI Serial E 2 PROM with Block Lock TM Protection |
| 中文描述： | SPI串行e的2座門鎖TM保護胎膜早破 |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 77K |
| 代理商： | X25128SI-2.7 |
X25128
2
PIN DESCRIPTIONS
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked
out by the falling edge of the serial clock.
Serial Input (SI)
SI is the serial data input pin. All opcodes, byte
addresses, and data to be written to the memory are
input on this pin. Data is latched by the rising edge of
the serial clock.
Serial Clock (SCK)
The Serial Clock controls the serial bus timing for data
input and output. Opcodes, addresses, or data present
on the SI pin are latched on the rising edge of the
clock input, while data on the SO pin change after the
falling edge of the clock input.
Chip Select (CS)
When CS is high, the X25128 is deselected and the
SO output pin is at high impedance and unless an
internal write operation is underway, the X25128 will
be in the standby power mode. CS low enables the
X25128, placing it in the active power mode. It should
be noted that after power-up, a high to low transition
on CS is required prior to the start of any operation.
Write Protect (WP)
When WP is low and the nonvolatile bit WPEN is “1”,
nonvolatile writes to the X25128 status register are
disabled, but the part otherwise functions normally.
When WP is held high, all functions, including nonvola-
tile writes operate normally. WP going low while CS is
still low will interrupt a write to the X25128 status
register. If the internal write cycle has already been
initiated, WP going low will have no effect on a write.
The WP pin function is blocked when the WPEN bit in
the status register is “0”. This allows the user to install
the X25128 in a system with WP pin grounded and still
be able to write to the status register. The WP pin func-
tions will be enabled when the WPEN bit is set “0”.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought low while SCK is Low. To resume commu-
nication, HOLD is brought high, again while SCK is
low. If the pause feature is not used, HOLD should be
held high at all times.
PIN CONFIGURATION
PIN NAMES
3091 FM T01
Symbol
CS
SO
SI
SCK
WP
V
SS
V
CC
HOLD
NC
Description
Chip Select Input
Serial Output
Serial Input
Serial Clock Input
Write Protect Input
Ground
Supply Voltage
Hold Input
No Connect
3091 FM 02
Not to scale
14 Lead SOIC
NC
NC
1
2
3
4
7
6
5
X24128
VSS
NC
NC
NC
NC
.244”
.344”
8
9
10
11
12
14
13
8 Lead PDIP
VCC
HOLD
SCK
SI
CS
SO
1
2
3
4
6
5
7
8
X25128
VSS
.325”
.430”
WP
CS
SO
WP
VCC
HOLD
SCK
SI
16 Lead SOIC
NC
NC
NC
1
2
3
4
7
8
6
5
X25128
VSS
NC
NC
NC
NC
NC
.244”
.394”
9
10
11
12
13
14
16
15
CS
SO
WP
VCC
HOLD
SCK
SI
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X25128 | SPI Serial E 2 PROM with Block Lock TM Protection |
| X25128P | SPI Serial E 2 PROM with Block Lock TM Protection |
| X25128PI | SPI Serial E 2 PROM with Block Lock TM Protection |
| X25128PM | SPI Serial E 2 PROM with Block Lock TM Protection |
| X25128S | SPI Serial E 2 PROM with Block Lock TM Protection |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X25128SIG | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:SPI Serial E2PROM with Block Lock Protection |
| X25128SIG-2.7 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:SPI Serial E2PROM with Block Lock Protection |
| X25128SM | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:SPI Serial E 2 PROM with Block Lock TM Protection |
| X25128SM-2.7 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:SPI Serial E2PROM with Block Lock Protection |
| X25128SMG | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:SPI Serial E2PROM with Block Lock Protection |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。