參數(shù)資料
型號: X3100
廠商: Intersil Corporation
英文描述: Reed Relay; Contacts:SPST; Switching Current Max:0.5A; Switching Voltage Max:200V; Contact Carry Current:1A; Coil Voltage DC Max:5V; Relay Terminals:DIP-14; Relay Mounting:PC Board; Contact Carrying Power:10W
中文描述: 3或4芯鋰離子電池保護(hù)和監(jiān)控器IC
文件頁數(shù): 13/40頁
文件大?。?/td> 249K
代理商: X3100
X3100/X3101 – Preliminary Information
Characteristics subject to change without notice.
13 of 40
REV 1.1.8 12/10/02
www.xicor.com
over-charge and over-discharge protection circuitry is on
for approximately 2ms in each 125ms period. Over-
current monitoring is continuous. In monitor mode (see
page 20) over-charge and over-discharge monitoring is
also continuous.
Over-charge Protection
The X3100 and X3101 monitor the voltage on each
battery cell (V
CELL
). If for any cell, V
CELL
> V
OV
for a
time exceeding T
OV
, then the Charge FET will be
switched OFF (OVP/LMON=V
CC
). The device has now
entered Over-charge protection mode (Figure 5). The
status of the discharge FET (via pin UVP) will remain
unaffected.
While in over-charge protection mode, it is possible to
change the state of the OVPC bit in the control register
such
that
OVP/LMON=Vss
Although the OVPC bit in the control register can be
changed, the change will not be seen at pin OVP until
the X3100 or X3101 returns from over-charge
protection mode.
(Charge
FET=ON).
The over-charge detection delay T
OV
, is varied using a
capacitor (C
OV
) connected between pin OVT and GND.
A typical delay time is shown in Table 10. The delay T
OV
that results from a particular capacitance C
OV
, can be
approximated by the following linear equation:
T
OV
(s)
10 x C
OV
(μF).
Table 19. Typical over-charge detection time
The device further continues to monitor the battery cell
voltages, and is released from over-charge protection
mode when V
CELL
< V
OVR
, for all cells. When the X3100
or X3101 is released from over-charge protection
mode, the charge FET is automatically switched ON
(OVP/LMON=V
SS
). When the device returns from over-
charge protection mode, the status of the discharge
FET (pin UVP/OCP) remains unaffected.
The value of V
OV
can be selected from the values
shown in Table 4 by setting bits VOV1, VOV0. These bits
are set by using the WCFIG instruction to write to the
configuration register.
Figure 5. Over-charge Protection Mode—Event Diagram
Symbol
T
OV
C
OV
0.1μF
Delay
1.0s (Typ)
V
CELL
OVP/LMON
Normal Operation Mode
Over-charge
Protection
Mode
V
OV
V
OVR
T
OV
Normal Operation Mode
V
CC
V
SS
Event
0
1
2
3
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