參數(shù)資料
型號: X40421S14I-C
廠商: INTERSIL CORP
元件分類: 電源管理
英文描述: Dual Voltage Monitor with Intergrated CPU Supervisor
中文描述: 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14
封裝: 0.150 INCH, SOIC-14
文件頁數(shù): 20/25頁
文件大?。?/td> 156K
代理商: X40421S14I-C
PRELMNARY
WD1=0, WD0=0
WD1=0, WD0=1
WD1=1, WD0=0
WD1=1, WD0=1 (factory default)
Watchdog Reset Time Out Delay
WD1=0, WD0=0
WD1=0, WD0=1
Watchdog Reset Time Out Delay WD1=1, WD0=0
Watchdog timer restart pulse width
X40420/X40421 – Preliminary
Characteristics subject to change without notice.
20 of 25
REV 1.2.14 7/12/02
www.xicor.com
RESET/RESET/MR Timings
LOW VOLTAGE AND WATCHDOG TIMINGS PARAMETERS
(@25°C, VCC = 5V)
Note:
(1) Based on characterization data.
Symbol
t
RPD1
(1)
t
RPDL
t
LR
(1)
t
RPD2
(1)
t
PURST
Parameters
Min.
Typ.
Max.
5
Unit
μs
V
TRIP1
to RESET/RESET (Power down only)
V
TRIP1
to LOWLINE
LOWLINE to RESET/RESET delay (Power down only) [= t
RPD1
-t
RPDL
]
V
TRIP2
to V2FAIL
Power On Reset delay:
PUP1=0, PUP0=0
PUP1=0, PUP0=1 (factory default)
PUP1=1, PUP0=0
PUP1=1, PUP0=1
V
CC,
V2MON
Fall Time
V
CC,
V2MON
Rise Time
Reset Valid V
CC
MR to RESET/ RESET delay (activation only)
Pulse width Suppression Time for MR
Watchdog Timer Period:
500
ns
μs
5
50
(1)
200
400
(1)
800
(1)
ms
ms
ms
ms
t
F
t
R
20
20
1
500
50
mV
/
μs
mV
/
μs
V
ns
ns
V
RVALID
t
MD
t
in1
t
WDO
1.4
(1)
200
(1)
25
OFF
200
s
ms
ms
t
RST1
100
300
ms
t
RST2
t
RSP
12.5
1
25
37.5
ms
μs
V
CC
V
TRIP1
RESET
RESET
t
PURST
t
PURST
t
t
F
t
RPD1
V
RVALID
MR
t
MD
相關(guān)PDF資料
PDF描述
X40421V14-B Dual Voltage Monitor with Intergrated CPU Supervisor
X40421V14-C Dual Voltage Monitor with Intergrated CPU Supervisor
X40421V14I-A Dual Voltage Monitor with Intergrated CPU Supervisor
X40421V14I-B Dual Voltage Monitor with Intergrated CPU Supervisor
X40421V14I-C Dual Voltage Monitor with Intergrated CPU Supervisor
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