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參數(shù)資料
| 型號： | X40430V14IZ-AT1 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Triple Voltage Monitor with Integrated CPU Supervisor |
| 中文描述： | 3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14 |
| 封裝： | 4.40 MM, ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-14 |
| 文件頁數(shù)： | 7/26頁 |
| 文件大小： | 399K |
| 代理商： | X40430V14IZ-AT1 |
7
FN8251.1
May 24, 2006
PRINCIPLES OF OPERATION
Power-on Reset
Applying power to the X40430, X40431, X40434,
X40435 activates a Power-on Reset Circuit that pulls
the RESET/RESET pins active. This signal provides
several benefits.
– It prevents the system microprocessor from starting
to operate with insufficient voltage.
– It prevents the processor from operating prior to sta-
bilization of the oscillator.
– It allows time for an FPGA to download its configura-
tion prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power-up.
When V
CC
exceeds the device V
TRIP1
threshold value
for t
PURST
(selectable) the circuit releases the RESET
(X40431, X40435) and RESET (X40430, X40434) pin
allowing the system to begin operation.
Figure 1. Connecting a Manual Reset Push-Button
Manual Reset
By connecting a push-button directly from MR to ground,
the designer adds manual system reset capability. The
MR pin is LOW while the push-button is closed and
RESET/RESET pin remains HIGH/LOW until the push-
button is released and for t
PURST
thereafter.
Low Voltage V
CC
(V1 Monitoring)
During operation, the X40430, X40431, X40434,
X40435 monitors the V
CC
level and asserts
RESET/RESET if supply voltage falls below a preset
minimum V
TRIP1
. The RESET/RESET signal prevents
the microprocessor from operating in a power fail or
brownout condition. The RESET/RESET signal remains
active until the voltage drops below 1V. It also remains
active until V
CC
returns and exceeds V
TRIP1
for
t
PURST
.
Low Voltage V2 Monitoring
The X40430 also monitors a second voltage level and
asserts V2FAIL if the voltage falls below a preset mini-
mum V
TRIP2
. The V2FAIL signal is either ORed with
RESET to prevent the microprocessor from operating
in a power fail or brownout condition or used to inter-
rupt the microprocessor with notification of an impend-
ing power failure.
For the X40430 and X40431 the V2FAIL signal
remains active until the V2MON drops below 1V
(V2MON
falling). It also remains active until V2MON
returns and exceeds V
TRIP2
. This voltage sense cir-
cuitry monitors the power supply connected to V2MON
pin. If V
CC
= 0, V2MON can still be monitored.
For the X40434 and X40435, the V2FAIL signal
remains active until V
CC
drops below 1V and remains
active until V2MON returns and exceeds V
TRIP2
. This
sense circuitry is powered by V
CC
. If V
CC
= 0, V2MON
cannot be monitored.
Low Voltage V3 Monitoring
The X40430, X40431, X40434, X40435 also monitors
a third voltage level and asserts V3FAIL if the voltage
falls below a preset minimum V
TRIP3
. The V3FAIL sig-
nal is either ORed with RESET to prevent the micro-
processor from operating in a power fail or brownout
condition or used to interrupt the microprocessor with
notification of an impending power failure. The V3FAIL
signal remains active until the V3MON drops below 1V
(V3MON falling). It also remains active until V3MON
returns and exceeds V
TRIP3
.
This voltage sense circuitry monitors the power supply
connected to V3MON pin. If V
CC
= 0, V3MON can still
be monitored.
Early Low V
CC
Detection (LOWLINE)
This
CMOS
output
RESET/RESET whenever V
CC
falls below the V
TRIP1
voltage and returns high when V
CC
exceeds the
V
TRIP1
voltage. There is no power-up delay circuitry
(t
PURST
) on this pin.
goes
LOW
earlier
than
V
CC
MR
System
Reset
Manual
Reset
X40430, X40434
RESET
X40430, X40431, X40434, X40435
相關PDF資料 |
PDF描述 |
|---|---|
| X40430V14IZ-B | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40430V14Z-A | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40430V14Z-B | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40431S14IZ-A | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40431S14IZ-B | Triple Voltage Monitor with Integrated CPU Supervisor |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| X40430V14IZ-B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40430V14Z-A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40430V14Z-B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40431 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| X40431S14-A | 功能描述:IC VOLT MON TRPL EEPROM 14-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:100 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:- 復位:低有效 復位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:8-TSSOP 包裝:管件 |
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