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參數(shù)資料
| 型號(hào)： | X40431S14IZ-A |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Triple Voltage Monitor with Integrated CPU Supervisor |
| 中文描述： | 3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, SOIC-14 |
| 文件頁(yè)數(shù)： | 20/26頁(yè) |
| 文件大小： | 399K |
| 代理商： | X40431S14IZ-A |
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20
FN8251.1
May 24, 2006
EQUIVALENT A.C. OUTPUT LOAD CIRCUIT FOR
V
CC
= 5V
A.C. TEST CONDITIONS
SYMBOL TABLE
A.C. CHARACTERISTICS
Note:
(1) Cb = total capacitance of one bus line in pF.
Input pulse levels
Input rise and fall times
Input and output timing levels
Output load
V
CC
x 0.1 to
V
CC
x 0.9
10ns
V
CC
x 0.5
Standard output load
5V
SDA
30pF
V2MON, V3MON
4.6k
RESET
WDO
30pF
2.06k
V2FAIL,
V3FAIL
V
CC
4.6k
30pF
Must be
steady
Will be
steady
May change
from LOW
to HIGH
Will change
from LOW
to HIGH
May change
from HIGH
to LOW
Will change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
WAVEFORM
INPUTS
OUTPUTS
Symbol
f
SCL
t
IN
t
AA
t
BUF
t
LOW
t
HIGH
t
SU:STA
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
DH
t
R
t
F
t
SU:WP
t
HD:WP
Cb
Parameter
Min
Max
400
Unit
kHz
ns
μs
μs
μs
μs
μs
μs
ns
μs
μs
ns
ns
ns
μs
μs
pF
SCL Clock Frequency
Pulse width Suppression Time at inputs
SCL LOW to SDA Data Out Valid
Time the bus free before start of new transmission
Clock LOW Time
Clock HIGH Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
WP Setup Time
WP Hold Time
Capacitive load for each bus line
50
0.1
1.3
1.3
0.6
0.6
0.6
100
0
0.6
50
0.9
20 +.1Cb
(1)
20 +.1Cb
(1)
0.6
0
300
300
400
X40430, X40431, X40434, X40435
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| X40431S14IZ-B | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40431S14Z-A | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40431S14Z-B | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40431V14IZ-B | Triple Voltage Monitor with Integrated CPU Supervisor |
| X40431V14Z-A | Triple Voltage Monitor with Integrated CPU Supervisor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X40431S14IZ-AT1 | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.9V/1.7V 3000UA 14SOIC - Tape and Reel 制造商:Intersil Corporation 功能描述:Supervisory Circuits TRPL SUP 4K II2S LO I VT1 4 6 VT2 2 9 VT |
| X40431S14IZ-B | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.4V/2.6V/1.7V 3000UA 14SOIC - Rail/Tube 制造商:Intersil Corporation 功能描述:Supervisory Circuits TRPL SUP 4K II2S LO I VT1 4 4 VT2 2 6 VT |
| X40431S14IZ-BT1 | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.4V/2.6V/1.7V 3000UA 14SOIC - Tape and Reel 制造商:Intersil Corporation 功能描述:Supervisory Circuits TRPL SUP 4K II2S LO I VT1 4 4 VT2 2 6 VT |
| X40431S14Z-A | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.9V/1.7V 3000UA 14SOIC - Rail/Tube 制造商:Intersil Corporation 功能描述:Supervisory Circuits TRPL SUP 4K II2S LO VT1 4 6 VT2 2 9 VT3 |
| X40431S14Z-AT1 | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.9V/1.7V 3000UA 14SOIC - Tape and Reel 制造商:Intersil Corporation 功能描述:Supervisory Circuits TRPL SUP 4K II2S LO VT1 4 6 VT2 2 9 VT3 |
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