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參數(shù)資料
| 型號： | X4285 |
| 英文描述： | IGBT MODULE, DUAL 600VIGBT MODULE, DUAL 600V; Transistor type:IGBT; Case style:SEMITRANS2; Voltage, Vceo:600V; Voltage, Vce sat max:2.5V; Current, Ic continuous a max:70A; Current, Icm pulsed:70A; Time, rise:40ns; Centres, |
| 中文描述： | CPU監(jiān)控與128K的EEPROM的 |
| 文件頁數(shù)： | 8/22頁 |
| 文件大?。?/td> | 412K |
| 代理商： | X4285 |
X4283/85 – Preliminary Information
Characteristics subject to change without notice.
8 of 22
REV 1.17 11/27/00
www.xicor.com
Serial Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The device continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition has been met. See
Figure 6.
Serial Stop Condition
All communications must be terminated by a stop
condition, which is a LOW to HIGH transition of SDA
when SCL is HIGH. The stop condition is also used to
place the device into the Standby power mode after a
read sequence. A stop condition can only be issued
after the transmitting device has released the bus. See
Figure 6.
Figure 6. Valid Start and Stop Conditions
SCL
SDA
Start
Stop
Serial Acknowledge
Acknowledge is a software convention used to indicate
successful data transfer. The transmitting device, either
master or slave, will release the bus after transmitting
eight bits. During the ninth clock cycle, the receiver will
pull the SDA line LOW to acknowledge that it received
the eight bits of data. Refer to Figure 7.
The device will respond with an acknowledge after rec-
ognition of a start condition and if the correct Device
Identifier and Select bits are contained in the Slave
Address Byte. If a write operation is selected, the
device will respond with an acknowledge after the
receipt of each subsequent eight bit word. The device
will acknowledge all incoming data and address bytes,
except for the Slave Address Byte when the Device
Identifier and/or Select bits are incorrect.
In the read mode, the device will transmit eight bits of
data, release the SDA line, then monitor the line for an
acknowledge. If an acknowledge is detected and no
stop condition is generated by the master, the device
will continue to transmit data. The device will terminate
further data transmissions if an acknowledge is not
detected. The master must then issue a stop condition
to return the device to Standby mode and place the
device into a known state.
Figure 7. Acknowledge Response from Receiver
Data Output
from Transmitter
Data Output
from Receiver
8
1
9
START
Acknowledge
SCL from
Master
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X4285AL | LABELS,CABLE MARKERS,CABLE MARKERS,LABELS, CABLE MARKERS,IDENTIFICATION PRODUCTS,PAN-CODE? WIRE MARKER BOOKS ,PANDUIT |
| X4285AM | CPU Supervisor with 128K EEPROM |
| X4283AL | CPU Supervisor with 128K EEPROM |
| X4283AN | CPU Supervisor with 128K EEPROM |
| X4283AP | CPU Supervisor with 128K EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X4285AL | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4285AM | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4285AN | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4285AP | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4285F | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
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