參數(shù)資料
型號(hào): X4323S8I-4.5A
廠(chǎng)商: INTERSIL CORP
元件分類(lèi): 電源管理
英文描述: RTC Module With CPU Supervisor
中文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
封裝: 0.150 INCH, SOIC-8
文件頁(yè)數(shù): 4/21頁(yè)
文件大?。?/td> 333K
代理商: X4323S8I-4.5A
4
FN8122.0
March 29, 2005
Setting the V
TRIP
Voltage
This procedure is used to set the V
TRIP
to a higher or
lower voltage value. It is necessary to reset the trip
point before setting the new value.
To set the new V
TRIP
voltage, start by setting the WEL
bit in the control register, then apply the desired V
TRIP
threshold voltage to the V
CC
pin and the programming
voltage, V
P
,
to the WP pin and 2-byte address and 1
byte of “00” data. The stop bit following a valid write
operation initiates the V
TRIP
programming sequence.
Bring WP
LOW to complete the operation.
Resetting the V
TRIP
Voltage
This procedure is used to set the V
TRIP
to a “native”
voltage level. For example, if the current V
TRIP
is 4.4V
and the new V
TRIP
must be 4.0V, then the V
TRIP
must
be reset. When V
TRIP
is reset, the new V
TRIP
is some-
thing less than 1.7V. This procedure must be used to
set the voltage to a lower value.
To reset the new V
TRIP
voltage start by setting the
WEL bit in the control register, apply the desired V
TRIP
threshold voltage to the V
CC
pin and the programming
voltage, V
P
, to the WP pin and 2-byte address and 1
byte of “00” data. The stop bit of a valid write operation
initiates the V
TRIP
programming sequence. Bring WP
LOW to complete the operation.
Figure 2. Reset V
TRIP
Level Sequence (V
CC
> 3V. WP = 12-15V, WEL bit set)
Figure 3. Sample V
TRIP
Reset Circuit
0 1 2 3 4 5 6 7
SCL
SDA
A0h
0 1 2 3 4 5 6 7
00h
WP
V
P
= 12-15V
0 1 2 3 4 5 6 7
03h
0 1 2 3 4 5 6 7
00h
1
2
3
4
8
7
6
5
X4323
V
TRIP
Adj.
V
P
RESET
4.7K
SDA
SCL
μC
Adjust
Run
SOIC
X4323, X4325
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