參數(shù)資料
型號(hào)： X5643S14
廠(chǎng)商： INTERSIL CORP
元件分類(lèi)： 電源管理
英文描述： Film Capacitor; Voltage Rating:600VDC; Capacitor Dielectric Material:Polyester; Capacitance:0.0033uF; Capacitance Tolerance:+/- 10%; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Series:WMF RoHS Compliant: No
中文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14
封裝： PLASTIC, SOIC-14
文件頁(yè)數(shù)： 8/22頁(yè)
文件大小： 106K
代理商： X5643S14
X5643/X5645
Characteristics subject to change without notice.
8 of 22
For the page write operation (byte or page write) to be
completed, CS can only be brought HIGH after bit 0 of
the last data byte to be written is clocked in. If it is
brought HIGH at any other time, the write operation will
not be completed (Figure 4).
To write to the status register, the WRSR instruction is
followed by the data to be written (Figure 5). Data bits
0 and 1 must be “0” .
While the write is in progress following a status register or
EEPROM sequence, the status register may be read to
check the WIP bit. During this time the WIP bit will be high.
OPERATIONAL NOTES
The device powers-up in the following state:
– The device is in the low power standby state.
– A HIGH to LOW transition on CS is required to enter
an active state and receive an instruction.
– SO pin is high impedance.
– The write enable latch is reset.
– The flag bit is reset.
– Reset signal is active for t
PURST
.
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
– A WREN instruction must be issued to set the write
enable latch.
– CS must come HIGH at the proper clock count in
order to start a nonvolatile write cycle.
Figure 6. Read Status Register Sequence
Figure 7. Write Enable Latch Sequence
0
1
2
3
4
5
6
7
8
9
10
11 12 13 14
7
6
5
4
3
2
1
0
Data Out
CS
SCK
SI
SO
MSB
High Impedance
Instruction
0
1
2
3
4
5
6
7
CS
SI
SCK
High Impedance
SO
相關(guān)PDF資料
PDF描述
X5643S14-2.7 Film Capacitor; Voltage Rating:600VDC; Capacitor Dielectric Material:Polyester; Capacitance:0.0068uF; Capacitance Tolerance:+/- 10%; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Series:WMF RoHS Compliant: No
X5643S14-2.7A RTC Module With CPU Supervisor
X5643S14-4.5A RTC Module With CPU Supervisor
X5643S14I RTC Module With CPU Supervisor
X5643S14I-4.5A RTC Module With CPU Supervisor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
X5643S14-1.8 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:SPI Serial EEPROM with Supervisory Features
X5643S14-2.7 功能描述:IC CPU SUPRV 64K EE RST LO SO14 RoHS:否 類(lèi)別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開(kāi)路漏極或開(kāi)路集電極 復(fù)位:低有效 復(fù)位超時(shí):標(biāo)準(zhǔn)傳輸延遲為 60 µs 電壓 - 閥值:3V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:SC-74A，SOT-753 供應(yīng)商設(shè)備封裝:SOT-23-5 包裝:Digi-Reel® 其它名稱(chēng):LM8364BALMF30DKR
X5643S14-2.7A 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:CPU Supervisor with 64Kbit SPI EEPROM
X5643S14-4.5A 制造商:XICOR 制造商全稱(chēng):Xicor Inc. 功能描述:CPU Supervisor with 64Kbit SPI EEPROM
X5643S14I 功能描述:IC CPU SUPRV 64K EE RST LO SO14 RoHS:否 類(lèi)別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開(kāi)路漏極或開(kāi)路集電極 復(fù)位:低有效 復(fù)位超時(shí):標(biāo)準(zhǔn)傳輸延遲為 60 µs 電壓 - 閥值:3V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:SC-74A，SOT-753 供應(yīng)商設(shè)備封裝:SOT-23-5 包裝:Digi-Reel® 其它名稱(chēng):LM8364BALMF30DKR
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