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參數(shù)資料
| 型號： | X5645S14-1.8 |
| 元件分類： | EEPROM |
| 英文描述： | SPI Serial EEPROM with Supervisory Features |
| 中文描述： | SPI串行EEPROM，帶有監(jiān)控功能 |
| 文件頁數(shù)： | 2/22頁 |
| 文件大?。?/td> | 106K |
| 代理商： | X5645S14-1.8 |
X5643/X5645
Characteristics subject to change without notice.
2 of 22
PIN CONFIGURATION
PIN DESCRIPTION
Pin
PDIP
1
Pin
SOIC
2 & 3
Pin
TSSOP
2
Name
CS/WDI
Function
Chip Select Input.
at a high impedance state. Unless a nonvolatile write cycle is underway, the
device will be in the standby power mode. CS LOW enables the device, plac-
ing it in the active power mode. Prior to the start of any operation after power
up, a HIGH to LOW transition on CS is required.
Watchdog Input.
A HIGH to LOW transition on the WDI pin restarts the watch-
dog timer. The absence of a HIGH to LOW transition within the watchdog time-
out period results in RESET/RESET going active.
Serial Output.
SO is a push/pull serial data output pin. A read cycle shifts data
out on this pin. The falling edge of the serial clock (SCK) clocks the data out.
Serial Input.
SI is a serial data input pin. Input all opcodes, byte addresses, and
memory data on this pin. The rising edge of the serial clock (SCK) latches the
input data. Send all opcodes (Table 1), addresses and data MSB first.
Serial Clock.
The serial clock controls the serial bus timing for data input and
output. The rising edge of SCK latches in the opcode, address, or data bits
present on the SI pin. The falling edge of SCK changes the data output on the
SO pin.
Write Protect.
The WP pin works in conjunction with a nonvolatile WPEN bit
to “l(fā)ock” the setting of the watchdog timer control and the memory write protect
bits.
CS HIGH, deselects the device and the SO output pin is
2
4
3
SO
5
9
13
SI
6
10
14
SCK
3
5
7
WP
8-Lead PDIP
CS/WDI
WP
SO
1
2
3
4
RESET/RESET
8
7
6
5
14-Lead SOIC
SO
WP
V
SS
1
2
3
4
5
6
7
RESET/RESET
SCK
SI
14
13
12
11
10
9
8
NC
V
CC
V
CC
NC
X5643/45
SCK
SI
CS/WDI
NC
X5643/45
NC
CS/WDI
V
CC
V
SS
20-Lead TSSOP
NC
NC
NC
1
2
3
4
5
6
7
NC
NC
NC
20
19
18
17
16
15
14
13
NC
V
CC
RESET/RESET
NC
CS/WDI
WP
NC
X5643/45
SCK
SI
SO
8
9
10
12
11
NC
NC
NC
NC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X5643S8-1.8 | SPI Serial EEPROM with Supervisory Features |
| X5645S8-1.8 | SPI Serial EEPROM with Supervisory Features |
| X5645S8-2.7 | SPI Serial EEPROM with Supervisory Features |
| X5643P | RTC Module With CPU Supervisor |
| X5643P-4.5A | RTC Module With CPU Supervisor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X5645S14-2.7 | 功能描述:IC CPU SUPRV 64K EE RST HI SO14 RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:1 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復(fù)位:低有效 復(fù)位超時:標準傳輸延遲為 60 µs 電壓 - 閥值:3V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SC-74A，SOT-753 供應(yīng)商設(shè)備封裝:SOT-23-5 包裝:Digi-Reel® 其它名稱:LM8364BALMF30DKR |
| X5645S14-2.7A | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 64Kbit SPI EEPROM |
| X5645S14-4.5A | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 64Kbit SPI EEPROM |
| X5645S14I | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 64Kbit SPI EEPROM |
| X5645S14I-2.7 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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