參數(shù)資料
型號: X5645S8-2.7
元件分類: EEPROM
英文描述: SPI Serial EEPROM with Supervisory Features
中文描述: SPI串行EEPROM,帶有監(jiān)控功能
文件頁數(shù): 3/22頁
文件大?。?/td> 106K
代理商: X5645S8-2.7
X5643/X5645
Characteristics subject to change without notice.
3 of 22
4
8
7
6
8
19
18
V
V
SS
Ground
Supply Voltage
Reset Output
which goes active whenever V
It will remain active until V
200ms. RESET/RESET goes active if the watchdog timer is enabled and CS
remains either HIGH or LOW longer than the selectable watchdog time-out
period. A falling edge of CS will reset the watchdog timer. RESET/RESET
goes active on power up at about 1V and remains active for 200ms after the
power supply stabilizes.
No internal connections
12 & 13
11
CC
RESET/
RESET
.
RESET/RESET is an active LOW/HIGH, open drain output
CC
falls below the minimum V
CC
rises above the minimum V
CC
sense level for
sense level.
CC
1, 7, 8,
14
1, 4–6,
9–12,
15–17, 20
NC
PIN DESCRIPTION (CONTINUED)
Pin
PDIP
Pin
SOIC
Pin
TSSOP
Name
Function
PRINCIPLES OF OPERATION
Power On Reset
Application of power to the X5643/X5645 activates a
power on reset circuit. This circuit goes active at about
1V and pulls the RESET/RESET pin active. This signal
prevents the system microprocessor from starting to
operate with insufficient voltage or prior to stabilization
of the oscillator. When V
CC
value for 200ms (nominal) the circuit releases RESET/
RESET, allowing the processor to begin executing code.
exceeds the device V
TRIP
Low Voltage Monitoring
During operation, the X5643/X5645 monitors the V
level and asserts RESET/RESET if supply voltage falls
below a preset minimum V
signal prevents the microprocessor from operating in a
power fail or brownout condition. The RESET/RESET
signal remains active until the voltage drops below 1V.
It also remains active until V
V
TRIP
for 200ms.
CC
TRIP
. The RESET/RESET
CC
returns and exceeds
Watchdog Timer
The watchdog timer circuit monitors the microprocessor
activity by monitoring the WDI input. The micorproces-
sor must toggle the CS/WDI pin periodically to prevent a
RESET/RESET signal. The CS/WDI pin must be toggled
from HIGH to LOW prior to the expiration of the watchdog
time-out period. The state of two nonvolatile control
bits in the status register determine the watchdog timer
period. The microprocessor can change these watchdog
bits, or they may be “l(fā)ocked” by tying the WP pin LOW
and setting the WPEN bit HIGH.
V
The X5643/X5645 has a standard V
(V
TRIP
) voltage. This value will not change over normal
operating and storage conditions. However, in applica-
tions where the standard V
for higher precision in the V
X5645 threshold may be adjusted.
CC
Threshold Reset Procedure
CC
threshold
TRIP
is not exactly right, or
TRIP
value, the X5643/
Setting the V
This procedure sets the V
value. For example, if the current V
new V
TRIP
is 4.6V, this procedure directly makes the
change. If the new setting is lower than the current set-
ting, then it is necessary to reset the trip point before
setting the new value.
TRIP
Voltage
TRIP
to a higher voltage
TRIP
is 4.4V and the
To set the new V
threshold to the Vcc pin and tie the CS/WDI pin and the
WP pin HIGH. RESET/RESET and SO pins are left
unconnected. Then apply the programming voltage V
to both SCK and SI and pulse CS/WDI LOW then
HIGH. Remove V
P
and the sequence is complete.
TRIP
voltage, apply the desired V
TRIP
P
Figure 1. Set V
TRIP
Voltage
SCK
SI
V
P
V
P
CS
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