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參數(shù)資料
| 型號： | X5648 |
| 元件分類： | CPU監(jiān)測 |
| 英文描述： | RTC Module With CPU Supervisor |
| 中文描述： | 時鐘模塊CPU監(jiān)控 |
| 文件頁數(shù)： | 2/22頁 |
| 文件大?。?/td> | 120K |
| 代理商： | X5648 |
X5648/X5649
2
PIN DESCRIPTION
PIN CONFIGURATION
PIN
(SOIC/PDIP)
PIN
TSSOP
Name
Function
1
1
CS
Chip Select Input.
is at a high impedance state. Unless a nonvolatile write cycle is underway,
the device will be in the standby power mode. CS LOW enables the
device, placing it in the active power mode. Prior to the start of any
operation after power up, a HIGH to LOW transition on CS is required.
Serial Output.
SO is a push/pull serial data output pin. A read cycle shifts
data out on this pin. The falling edge of the serial clock (SCK) clocks the data
out.
Serial Input.
SI is a serial data input pin. Input all opcodes, byte addresses,
and memory data on this pin. The rising edge of the serial clock (SCK) latches
the input data. Send all opcodes (Table 1), addresses and data MSB first.
Serial Clock.
The Serial Clock controls the serial bus timing for data input
and output. The rising edge of SCK latches in the opcode, address, or data
bits present on the SI pin. The falling edge of SCK changes the data output
on the SO pin.
Write Protect.
The WP pin works in conjunction with a nonvolatile WPEN
bit to “l(fā)ock” the setting of the Watchdog Timer control and the memory
write protect bits.
CS HIGH, deselects the device and the SO output pin
2
2
SO
5
8
SI
6
9
SCK
3
6
WP
4
7
V
SS
Ground
8
14
V
CC
Supply Voltage
Reset Output
which goes active whenever Vcc falls below the minimum Vcc sense level.
It will remain active until Vcc rises above the minimum Vcc sense level for
200ms. RESET/RESET goes active if the Watchdog Timer is enabled and
CS remains either HIGH or LOW longer than the selectable Watchdog
time-out period. A falling edge of CS will reset the Watchdog Timer.
RESET/RESET goes active on power up at about 1V and remains active
for 200ms after the power supply stabilizes.
No internal connections
7
13
RESET/
RESET
. RESET/RESET is an active LOW/HIGH, open drain output
3-5,10-12
NC
8-LEAD PDIP
CS
SO
WP
VSS
1
2
3
4
RESET/RESET
SCK
SI
8
7
6
5
VCC
14-LEAD SOIC
CS
CS
V
SS
NC
1
2
3
4
5
6
7
RESET/RESET
SCK
SI
NC
14
13
12
11
10
9
8
V
CC
NC
V
CC
X5648/49
NC
SO
WP
X5648/49
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相關代理商/技術參數(shù) |
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| X5648P | 功能描述:IC SUPERVISOR CPU 64K EE 8-DIP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復位:低有效 復位超時:最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤 供應商設備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
| X5648P-2.7 | 功能描述:IC SUPERVISOR CPU 64K EE 8-DIP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復位:低有效 復位超時:最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤 供應商設備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
| X5648P-2.7A | 功能描述:IC SUPERVISOR CPU 64K EE 8-DIP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復位:低有效 復位超時:最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤 供應商設備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
| X5648P-4.5A | 功能描述:IC SUPERVISOR CPU 64K EE 8-DIP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復位:低有效 復位超時:最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤 供應商設備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
| X5648PI | 功能描述:IC SUPERVISOR CPU 64K EE 8-DIP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復位:低有效 復位超時:最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤 供應商設備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
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