參數(shù)資料
型號： X68C75P
英文描述： Port Expander and E2 Memory
中文描述： 端口擴展和E2內(nèi)存
文件頁數(shù)： 1/26頁
文件大?。?/td> 123K
代理商： X68C75P
1
X68C75 SLIC
E
2
X68C75 SLIC
E
2
Microperipheral
FEATURES
Highly Integrated Microcontroller Peripheral
—8K x 8 E
2
Memory
—2 x 8 General Purpose Bidirectional I/O Ports
—16 x 8 General Purpose Registers
—Integerated Interrupt Controller Module
—Internal Programmable Address Decoding
Self Loading Integrated Code (SLIC)
—On-Chip BIOS and Boot Loader
—IBM/PC Based Interface Software(XSLIC)
Concurrent Read During Write
—Dual Plane Architecture
Isolates Read/Write Functions Between
Planes
Allows Continuous Execution Of Code
From One Plane While Writing In The
Other Plane
Multiplexed Address/Data Bus
—Direct Interface to Popular 68HC11 Family of
Microcontrollers
Software Data Protection
—Protect Entire Array During Power-up/-down
Block Lock Data Protection
—Set Write Lockout in 1K Blocks
Toggle Bit Polling
Xicor, Inc. 1994, 1995, 1996 Patents Pending
2899-2.1 4/11/97 T0/C0/D1 SH
Characteristics subject to change without notice
Port Expander and
E
2
Memory
PIN CONFIGURATIONS
High Performance CMOS
—Fast Access Time, 120ns
—Low Power
60mA Active
100
μ
A Standby
PDIP, PLCC, and TQFP Packaging Available
DESCRIPTION
The X68C75 is a highly integrated peripheral for the
68HC11 family of microcontrollers. The device inte-
grates 8K-bytes of 5V byte-alterable nonvolatile memory,
2 bidirectional 8-bit ports, 16 general purpose registers,
programmable internal address decoding and a multi-
plexed address and data bus.
The 5V byte-alterable nonvolatile memory can be used
as program storage, data storage, or a combination of
both. The memory array is separated into two 4K-byte
sections which allows read accesses to one section
while a write operation is taking place in the other
section. The nonvolatile memory also features Software
Data Protection to protect the contents during power
transitions, and an advanced Block Protect register
which allows individual blocks of the memory to be
configured as read-only or read/write.
2899 ILL F01
RESET
A12
WC
SEL
STRA
A15
NC
A14
A13
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
NC
A/D0
A/D1
A/D2
A/D3
A/D4
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VCC
R/W
AS
A8
A9
A11
NC
IRQ
STRB
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
NC
E
A10
CE
A/D7
A/D6
A/D5
X68C75
DIP
S LIC
Concurrent Read During Write, Block Lock, and SLIC
E
2
are registered trademarks of Xicor, Inc.
A
PPLICATION
N
OTES
A V A I L A B L E
INDEX
CORNER
2899 ILL F02.3
6 5 4 3 2 1 44 43 42 41 40
18 19 20 22 23 24 25 26 27 28
21
39
38
37
36
35
34
33
32
31
30
29
7
8
9
10
11
12
13
14
15
16
17
A1
S
S
W
A1
R
VC
R
A
A8
A9
A11
IRQ
STRB
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
A14
A13
PA7
PA6
PA5
PA4
PA3
33
PA2
PA1
PA0
A/D0
A1
A2
A3
A4
VS
A5
A6
A7
C
A1
E
X68C75
SLIC
PLCC
TQFP
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