- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371269 > X76F100M8I-3.0 1K 128 x 8 Bit PDF資料下載
參數(shù)資料
| 型號(hào)： | X76F100M8I-3.0 |
| 英文描述： | 1K 128 x 8 Bit |
| 中文描述： | 每1000 128 × 8位 |
| 文件頁(yè)數(shù)： | 1/17頁(yè) |
| 文件大?。?/td> | 275K |
| 代理商： | X76F100M8I-3.0 |
當(dāng)前第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)
REV 1.0 6/22/00
Characteristics subject to change without notice.
1 of 16
www.xicor.com
1K
X76F100
128 x 8 Bit
Secure SerialFlash
FEATURES
64-bit password security
One array (112-bytes) two passwords (16-bytes)
—Read password
—Write password
Programmable passwords
Retry counter register
—Allows 8 tries before clearing of the array
32-bit response to reset (rst input)
8-byte sector Write Mode
1MHz clock rate
2-wire serial interface
Low power CMOS
—3.0 to 5.5V operation
—Standby current less than 1μA
—Active current less than 3 mA
High reliability endurance:
—100,000 write cycles
Data retention: 100 years
Available in:
—8-lead PDIP, SOIC, MSOP, and smart car module
DESCRIPTION
The X76F100 is a Password Access Security Supervi-
sor, containing one 896-bit Secure SerialFlash array.
Access to the memory array can be controlled by two
64-bit passwords. These passwords protect read and
write operations of the memory array.
The X76F100 features a serial interface and software
protocol allowing operation on a popular two wire bus.
The bus signals are a clock Input (SCL) and a bidirec-
tional data input and output (SDA). Access to the
device is controlled through a chip select (CS) input,
allowing any number of devices to share the same bus.
The X76F100 also features a synchronous response
to reset providing an automatic output of a hard-wired
32-bit data stream conforming to the industry standard
for memory cards.
The X76F100 utilizes Xicor’s proprietary Direct Write
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
BLOCK DIAGRAM
Logic
CS
SCL
SDA
RST
Interface
8K Byte
Data Transfer
Array Access
Enable
Reset
Response Register
Password Array
and Password
Verification Logic
Chip Enable
Retry Counter
SerialFlash Array
Array 0
(Password Protected)
32 Byte
SerialFlash Array
Array 1
(Password Protected)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X76F100P | 1K 128 x 8 Bit |
| X76F100P-3.0 | 1K 128 x 8 Bit |
| X76F100PI | 1K 128 x 8 Bit |
| X76F100PI-3.0 | 1K 128 x 8 Bit |
| X76F100S8 | 1K 128 x 8 Bit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X76F100P | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:1K 128 x 8 Bit |
| X76F100P-3.0 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:1K 128 x 8 Bit |
| X76F100PI | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:1K 128 x 8 Bit |
| X76F100PI-3.0 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:1K 128 x 8 Bit |
| X76F100S8 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:1K 128 x 8 Bit |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。