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參數(shù)資料
| 型號： | X76F641HE |
| 英文描述： | Secure SerialFlash |
| 中文描述： | 安全SerialFlash |
| 文件頁數(shù)： | 12/17頁 |
| 文件大小： | 116K |
| 代理商： | X76F641HE |
X76F641
12
AC CHARACTERISTICS
AC Specifications
(Over the recommended operating conditions)
Notes:
1.
Typical values are for T
A
= 25C and V
CC
= 5.0V
Notes:
2.
C
b
= Total Capacitance of one bus line in pf.
Symbol
f
SCL
Parameter
Min
Typ
(1)
Max
Units
SCL Clock Frequency
0
400
KHz
t
IN(1)
Pulse width of spikes which must be suppressed by
the input filter
50
100
ns
t
AA
SCL LOW to SDA Data Out Valid
0.1
0.3
0.9
μ
s
t
BUF
Time the bus must be free before a new transmit
can start
1.3
μ
s
t
LOW
t
HIGH
t
SU:STA
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
DH
Clock LOW Time
1.3
μ
s
Clock HIGH Time
0.6
μ
s
Start Condition Setup Time
0.6
μ
s
Start Condition Hold Time
0.6
μ
s
Data In Setup Time
100
ns
Data In Hold Time
0
μ
s
Stop Condition Setup Time
0.6
μ
s
Data Output Hold Time
50
300
ns
t
R
SDA and SCL Rise Time
20 + 0.1 x C
b(2)
20 + 0.1 x C
b(2)
300
ns
t
F
SDA and SCL Fall Time
300
ns
f
SCL_RST
SCL Clock Frequency during Response to Reset
400
kHz
t
SR
t
NOL
t
RST
t
SU:RST
t
LOW_RST
t
HIGH_RST
t
RDV
t
CDV
Device Select to RST active
200
ns
RST to SCL Non-Overlap
500
ns
RST High Time
2.25
μ
s
Response to Reset Setup Time
1.25
μ
s
Clock LOW during Response to Reset
1.25
μ
s
Clock HIGH during Response to Reset
1.25
μ
s
RST LOW to SDA Valid During Response to Reset
0
500
ns
CLK LOW to SDA Valid During Response to Reset
0
500
ns
t
DHZ
Device Deselect to SDA high impedance
0
500
ns
7025 FM T14
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| X76F641XE | Secure SerialFlash |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X76F641HE-2.0 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Secure SerialFlash |
| X76F641HEG | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Secure Serial Flash |
| X76F641HEG-2.0 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Secure Serial Flash |
| X76F641HG | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Secure Serial Flash |
| X76F641HG-2.0 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Secure Serial Flash |
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