FN8156.0 February 2, 2005 Block Diagram Cm CPAD U/D INC CS V
參數(shù)資料
型號: X90100EVAL
廠商: Intersil
文件頁數(shù): 2/7頁
文件大小: 0K
描述: EVALUATION BOARD DIGITAL CAPACIT
標(biāo)準(zhǔn)包裝: 1
主要目的: 數(shù)字電容器
已用 IC / 零件: X90100
已供物品:
2
FN8156.0
February 2, 2005
Block Diagram
Cm
CPAD
U/D
INC
CS
VSS
CPAD
Cp
1*CU
2*CU
4*CU
8*CU
16*CU
Logic and E2
Power On Reset
VCC
Pin Descriptions
MSOP
SYMBOL
BRIEF DESCRIPTION
1INC
Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the capacitance value and
either increment or decrement the counter in the direction indicated by the logic level on the U/D input.
2U/D
Up/Down (U/D). The U/D input controls the direction of the trimmed capacitor value and whether the counter
is incremented or decremented.
3VSS
Ground.
4Cp
Cp. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical
trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance
across the terminals is determined by digital inputs INC, U/D, and CS.
5Cm
Cm. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical
trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance
across the terminals is determined by digital inputs INC, U/D, and CS.
6N/C
Not Connected. Must be floating.
7CS
Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in
nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is
complete the X90100 will be placed in the low power standby mode until the device is selected once again.
8VCC
Positive Supply Voltage.
X90100
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